3D Flash Memory Block Stacking With Connection Pads
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Solution Overview
Problem
The degradation of memory cell characteristics and increased complexity in connecting vertical channel structures in three-dimensional flash memory devices due to the extension of vertical channel structures and the complexity of the stack process.
Innovation Solution
A three-dimensional flash memory structure where a first memory block and a second memory block are connected through a connection pad, with the connection pad including wiring lines for bit lines, functioning as both a connection and wiring line, and potentially using through silicon via (TSV) for bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of stacked stack structures is increased to increase the degree of integration, then memory capacity is improved, but memory cell characteristics are degraded due to length extension of vertical channel structures
Solution Approach 1:
The patent divides the memory structure into multiple independent stack structures, each with its own vertical channel structures. By segmenting the memory into separate stacks rather than extending a single vertical channel, the patent maintains memory cell characteristics while increasing overall memory capacity through parallel stacking of multiple independent units.
Solution Approach 2:
The patent transitions from extending vertical channel structures in the vertical direction to arranging multiple stack structures in the horizontal direction. This dimensional shift allows memory capacity to be increased by adding stacks side-by-side rather than by extending vertical channels upward, thereby avoiding the degradation of memory cell characteristics associated with excessive vertical channel length.
2Quantity of substance
If the number of stacked stack structures is increased to increase the degree of integration, then memory capacity is improved, but process complexity is increased in connecting vertical channel structures
Solution Approach 1:
The patent segments the memory device into multiple independent stack structures that can be manufactured separately and then connected. This segmentation simplifies the manufacturing process by allowing each stack to be processed independently through the stack process, reducing the overall process complexity compared to attempting to connect extensive vertical channel structures.
Solution Approach 2:
The patent introduces connection pads as intermediary elements that facilitate the connection between vertical channel structures of different stack structures. These connection pads serve as mediators that simplify the connection process, making it easier to integrate multiple stacks without proportionally increasing process complexity.
3Reliability
If connection pads are used to connect memory blocks, then connectivity between blocks is improved, but device structure becomes more complex
Solution Approach 1:
The patent designs connection pads that serve multiple functions: they provide electrical connection between memory blocks and also function as wiring lines for bit lines. This multi-functionality reduces the need for separate dedicated connection structures, thereby improving connectivity while minimizing the increase in structural complexity.
Solution Approach 2:
The patent merges the connection function and the wiring function into a single integrated structure (the connection pad). By combining these two functions that were previously separate into one unified element, the patent achieves effective connectivity between memory blocks without proportionally increasing the overall device structure complexity.
Data Source
AI summary
A stack process-based three-dimensional flash memory and a manufacturing method therefor are disclosed. According to an embodiment, the three-dimensional flash memory may comprise: a first memory block including first vertical channel structures formed to extend in a vertical direction on a first substrate; a second memory block including second vertical channel structures formed to extend in a vertical direction on a second substrate; and a connection pad for connecting the first memory block and the second memory block to each other.