3D Flash Memory via Through-Silicon Vias
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Solution Overview
Problem
Current flash memory technologies lack three-dimensional structures, which limits efficiency in physical space utilization, manufacturing complexity, power usage, thermal characteristics, and cost effectiveness.
Innovation Solution
The implementation of three-dimensional flash memory systems using through-silicon vias (TSVs) to connect multiple dies within a single package, allowing for efficient sharing of circuit blocks and reducing the need for redundant components, while utilizing TSVs strategically to avoid interference with flash arrays and enabling testing of good dies before stacking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If three-dimensional stacked die structure is implemented, then physical space utilization is improved, but device complexity increases
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement of flash memory dies to a three-dimensional stacked configuration using through-silicon vias (TSVs) for vertical interconnection. This dimensional change enables significantly improved physical space utilization by stacking multiple dies vertically, allowing the memory system to achieve higher capacity density without proportionally increasing the footprint area.
Solution Approach 2:
The patent divides the flash memory system into multiple separate dies that are stacked vertically, with each die containing specific functional blocks. This segmentation allows different dies to be independently fabricated, tested, and then combined through TSV interconnections, managing the overall device complexity by breaking down the monolithic structure into modular units.
2Ease of manufacture
If circuit blocks are shared across multiple dies, then manufacturing complexity is reduced, but device complexity increases
Solution Approach 1:
The patent implements shared circuit blocks such as charge pumps and control logic that serve multiple flash memory arrays across different dies. For example, a single charge pump circuit can provide voltage boosting for program and erase operations to multiple dies, and control logic can manage sectors distributed across the stacked structure. This multi-functionality reduces manufacturing complexity by eliminating redundant components while the TSV interconnection system manages the increased device complexity through organized vertical routing.
3Volume of moving object
If through-silicon vias are used for interconnection, then physical space efficiency is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs through-silicon vias (TSVs) to create vertical interconnections between stacked dies, transitioning the interconnection architecture from lateral routing to vertical routing. This enables compact three-dimensional integration where multiple dies are connected through the thickness of the stack, significantly improving physical space efficiency by reducing the footprint area required for equivalent memory capacity.
Solution Approach 2:
The patent utilizes copper filling of TSVs with electroplating processes, which involves controlled deposition of conductive material through the via holes. This manufacturing technique requires precise control of plating parameters to ensure complete via fill and proper via-to-pad alignment, thereby increasing manufacturing precision requirements while achieving the benefits of three-dimensional integration.
4Use of energy by moving object
If multiple dies are stacked in a single package, then power consumption is reduced, but thermal management challenges increase
Solution Approach 1:
The patent combines multiple flash memory dies into a single integrated package with shared power and ground networks. By stacking dies and using TSVs for interconnection, the system achieves more efficient power distribution and reduces overall power consumption compared to separate packages. The shared control logic and peripheral circuits further contribute to reduced power usage, though this consolidation creates thermal management challenges due to the concentrated heat generation in the stacked structure.
Data Source
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AI summary
A three-dimensional flash memory system is disclosed.