3D Flash Memory Passive Device Integration Using Through-Array Vias
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Solution Overview
Problem
Traditional 3D flash memory devices require additional mask and processes to manufacture passive devices, leading to increased costs and defect formation risks.
Innovation Solution
Integrating passive devices and 3D flash memory arrays at the same layer, using through-array vias to connect them, thereby reducing the need for additional photomasks and manufacturing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If passive devices are manufactured separately after the 3D flash memory array is completed, then the functionality of the device is ensured, but additional mask and processes are required which increase manufacturing cost and defect formation risk
Solution Approach 1:
The patent merges the passive device manufacturing process with the 3D flash memory array manufacturing process by forming both structures simultaneously from the same conductive layer. The passive devices are created in a first region while the memory array is formed in a second region, eliminating the need for separate post-processing steps and reducing overall manufacturing complexity
2Reliability
If passive devices are manufactured separately after the 3D flash memory array is completed, then the device functionality is ensured, but additional photomask manufacturing processes are required which increase cost and defect probability
Solution Approach 1:
The patent combines the fabrication of passive devices and memory array into a single integrated process using the same conductive layer and photomask sets. This merging eliminates additional photomask manufacturing requirements and reduces the cumulative defect probability associated with multiple sequential processing steps
Solution Approach 2:
The conductive layer serves multiple functions: it forms both the passive devices in the first region and the memory array structures in the second region. This multi-functionality approach allows a single material layer to fulfill different circuit requirements, reducing the number of separate manufacturing operations needed
Data Source
AI summary
A 3D flash memory device such as a 3D AND flash memory device is provided. The 3D flash memory device includes a substrate, a conductive layer, a 3D flash memory array, and through-array vias (TAVs). The substrate includes a memory cell region and a passive device region. The conductive layer is formed on the substrate, and the conductive layer includes: a first circuit disposed at the memory cell region and a second circuit of a passive device disposed at the passive device region. The 3D flash memory array is formed on the first circuit of the memory cell region. The TAVs are respectively formed on the second circuit of the passive device disposed at the passive device region and connected to at least one end of the second circuit.


