3D Flash Memory Word Line Programming Modes
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Solution Overview
Problem
In three-dimensional flash memory devices, the program, read, or erase characteristics of memory cells vary significantly based on their location within the stacked structure, leading to inefficiencies in data access and storage due to the lack of tailored access parameters for each layer.
Innovation Solution
A storage device and access method that classify word lines into leading and following word lines, using distinct program modes and parameters based on the location of memory cells within the three-dimensional structure, where memory cells connected to leading word lines are programmed using a default mode and those connected to following word lines are programmed using optimized parameters adjusted from the program result information of the leading word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single uniform program mode is used for all memory cells in the three-dimensional structure, then the device complexity is reduced, but the access speed and programming efficiency deteriorate due to varying characteristics of memory cells at different locations
Solution Approach 1:
The patent segments the memory cells into two distinct groups based on their location: leading word lines and following word lines. This segmentation allows different program modes to be applied to each group, optimizing access speed for cells that require it while maintaining simplicity through clear classification rather than complex continuous adjustment.
Solution Approach 2:
The patent applies local quality by assigning different program modes to different regions of the memory structure. Leading word lines use a first program mode optimized for their specific characteristics, while following word lines use a second program mode. This localized optimization improves overall access speed without requiring complete redesign of the entire memory system.
2Productivity
If different program modes are applied to leading and following word lines, then the programming efficiency and access speed improve, but the device complexity increases due to multiple program parameters
Solution Approach 1:
The patent changes key parameters such as program pulse width, verify pulse width, and voltage levels to create distinct program modes. By adjusting these parameters systematically rather than using completely different programming approaches, the patent achieves improved programming efficiency while controlling the increase in device complexity through structured parameter variation.
3Reliability
If program parameters are optimized for specific word lines, then the reliability of memory cells improves, but the access time increases due to additional parameter adjustment and verification
Solution Approach 1:
The patent performs preliminary classification of word lines into leading and following groups before programming begins. This preliminary action allows the system to pre-determine the appropriate program mode for each group, avoiding the need for time-consuming parameter adjustment during the actual programming process and thus maintaining fast access times while ensuring reliability through appropriate mode selection.
Solution Approach 2:
The patent incorporates verify pulses that provide feedback on the programming status of memory cells. By using feedback from verify operations, the system can confirm reliable programming without requiring excessive programming iterations, thus maintaining both high reliability and efficient access time through targeted verification rather than continuous checking.
Data Source
AI summary
A method of accessing a nonvolatile memory device which includes a memory block where semiconductor layers including word lines are stacked includes receiving a write request for the memory block, determining whether the write request corresponds to one or more leading word lines, programming, in response to the write request determined as corresponding to the leading word lines, memory cells connected thereto in a first program mode, and programming, when the write request is determined as corresponding to a following word line different from the leading word lines, memory cells connected to the following word line in a second program mode. The second program mode is performed with a second program parameter including at least one of a number of program pulses, a number of program verify pulses, a program start voltage, and a program end voltage that is different from a corresponding first parameter of the first program mode.