3D Gate Structure for Longer Semiconductor Channel Control
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Solution Overview
Problem
The continuous shrinkage of semiconductor structures leads to a shortening of the channel region, affecting the performance of semiconductor devices by decreasing the threshold voltage and deteriorating the turn-off capability.
Innovation Solution
A semiconductor structure design featuring a gate with a first conductive portion and multiple second conductive portions located below the substrate surface, arranged at intervals, increases the channel length by enhancing the facing area between the gate and the active region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the semiconductor structure continues to shrink to increase integration density, then the device size is reduced, but the channel length shortens causing threshold voltage decrease and turn-off capability deterioration
Solution Approach 1:
The gate structure extends from a conventional planar configuration into the substrate vertically, creating a three-dimensional configuration with conductive portions at different depths. This dimensional transition allows the gate to control a longer channel length without increasing the planar footprint, thereby maintaining threshold voltage stability while preserving small device size.
Solution Approach 2:
Multiple conductive portions are nested at different vertical levels within the substrate, with first conductive portions positioned at a first depth and second conductive portions positioned at a second depth. This nested arrangement allows the gate structure to encompass a longer effective channel length through vertical stacking, solving the short channel effect without expanding the horizontal device dimensions.
2Reliability
If the channel length is increased to improve threshold voltage control, then the turn-off capability is improved, but the device size increases
Solution Approach 1:
The patent utilizes the vertical dimension by positioning conductive gate portions at different depths within the substrate. This allows the effective channel length to be extended through the vertical stacking of conductive portions, achieving improved turn-off capability without proportionally increasing the horizontal device footprint.
Solution Approach 2:
The gate is segmented into multiple conductive portions positioned at different vertical levels, each contributing to the overall channel control. This segmentation allows the channel length to be distributed across multiple vertical segments, achieving long effective channel length while maintaining compact horizontal dimensions.
Data Source
AI summary
A semiconductor structure is provided. The semiconductor structure includes a substrate and a gate. The substrate has an active region which includes a first doped region, a channel region and a second doped region arranged along a first direction. The gate includes a first conductive portion and at least two second conductive portions contacted with and connected to the first conductive portion, the first conductive portion is located above an upper surface of the substrate, the second conductive portions are located below the upper surface of the substrate, adjacent second conductive portions are arranged at intervals along the first direction, and the channel region surrounds sidewalls and a bottom surface of each of the second conductive portions. A method for manufacturing a semiconductor structure is also provided.


