3D HBM Optical Stacking With Cooling Die for Thermal Limits
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Solution Overview
Problem
High performance computing requires additional high bandwidth memory (HBM) dies, but their integration is limited by space, power, and thermal constraints within packages, necessitating innovative solutions for increased memory bandwidth and capacity.
Innovation Solution
The 3D-stacking of HBM dies with an optical interface and a cooling die, connected via optical fibers, allows for high performance computing while maintaining thermal control and reducing the footprint of the HBM optics module package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If additional HBM dies are integrated in a package to increase bandwidth and capacity, then memory performance is improved, but space constraints, power constraints, and thermal constraints are exceeded
Solution Approach 1:
The patent transitions from 2D planar integration to 3D vertical stacking of HBM dies. Multiple HBM dies are stacked in the vertical dimension and interconnected through through-silicon vias (TSVs), enabling increased memory capacity and bandwidth without expanding the package footprint. This dimensional change resolves the contradiction by utilizing the third dimension (height) to accommodate additional memory components while maintaining compact package area.
Solution Approach 2:
The patent implements a nested structure where multiple HBM dies are stacked and interconnected through TSVs that pass through intermediate layers. The interconnect structure nests signal paths through the vertical stack, with TSVs providing electrical connections between dies at different levels. This nesting approach allows dense integration of multiple memory dies within a compact volume, addressing the space constraint while maintaining high bandwidth.
2Productivity
If additional HBM dies are integrated in a package to increase bandwidth and capacity, then memory performance is improved, but thermal constraints are exceeded
Solution Approach 1:
The patent introduces an intermediate cooling structure between the HBM die stack and the package substrate. This cooling intermediary (such as an interposer with integrated heat dissipation features or a dedicated cooling plate) acts as a thermal management component that actively removes heat from the high-density HBM stack. The intermediary provides thermal pathways and cooling channels that prevent heat accumulation, resolving the thermal constraints while enabling high-performance memory operation.
3Productivity
If HBM dies are stacked in 3D to increase capacity, then memory bandwidth is improved, but manufacturing complexity increases
Solution Approach 1:
The patent employs a universal interconnect platform using standardized TSV structures that serve multiple functions: electrical signal transmission, thermal management pathways, and mechanical alignment features. The TSV technology provides a multi-functional solution that handles both data signals and power/ground connections while also serving as alignment references during assembly. This universality reduces manufacturing complexity by using a single integrated approach rather than separate specialized structures for each function.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables high bandwidth and power efficiency with effective thermal management, allowing for increased connectivity speeds and efficient operation without performance degradation, even at greater distances from ASIC packages.
Implementation Method 1
a cooling die located between the one or more HBM dies and the optical chiplet, wherein the cooling die contains an inlet for a cooling material, an outlet for a cooling material, one or more channels configured to transport the cooling material
Data Source
AI summary
The technology generally relates to high bandwidth memory (HBM) and optical connectivity stacking. Disclosed systems and methods herein allow for 3D-stacking of HBM dies that are interconnected with an optical interface in a manner that allows for compact, high-performance computing. An optical chiplet can be configured to be placed onto a stack of HBM dies, with a cooling die that is positioned between the HBM dies and the optical chiplet. The optical chiplet may be configured to connect the HBM optics module package to one or more other components of the package via to one or more optical fibers.