Three-Dimensional HEMT Channel for Normally-Off Operation
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Solution Overview
Problem
Conventional high electron mobility transistors (HEMTs) lack a three-dimensional channel structure, which limits their ability to function as enhancement mode devices without applying a bias voltage, making them unsafe and requiring complex control circuits.
Innovation Solution
A HEMT device with a three-dimensional channel structure is designed, featuring a channel layer with both polar and non-polar planes, where a barrier layer forms a hetero-junction inducing two-dimensional electron gas only on polar planes, allowing for a discontinuous conductive channel that becomes continuous with proper bias voltage, enabling enhancement mode operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional HEMT structure is used, then the device can be manufactured with existing processes, but the transistor cannot operate in enhancement mode without applying bias voltage
Solution Approach 1:
The patent introduces a three-dimensional channel structure with vertical walls having different crystallographic orientations (polar and non-polar planes) to achieve enhancement mode operation. This dimensional change from conventional planar structures enables the transistor to be normally-off without requiring complex control circuits or additional biasing mechanisms.
Solution Approach 2:
The patent creates local quality differences by forming channel regions with specific polar plane orientations in certain areas and non-polar plane orientations in other areas. This local variation in crystallographic properties enables selective formation of two-dimensional electron gas, allowing enhancement mode operation while maintaining compatibility with existing manufacturing processes.
2Adaptability or versatility
If a three-dimensional channel structure with polar and non-polar planes is introduced, then enhancement mode operation is achieved, but the manufacturing process becomes more complex
Solution Approach 1:
The patent achieves enhancement mode operation by changing the crystallographic orientation parameters of the channel structure. Specifically, it forms vertical walls with polar planes (e.g., {10-10} or {11-20} orientations) and non-polar planes, which fundamentally alters the electronic properties at the hetero-interface to enable normally-off behavior without complicating the overall manufacturing workflow.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The three-dimensional channel structure allows for a normally-off HEMT operation, enhancing safety and simplifying circuit design by ensuring the transistor is off without bias, and integrating with depletion mode HEMTs and schottky diodes for basic logic circuits.
Implementation Method 1
HEMT includes a hetero-junction formed by two semiconductor materials with different band gaps. Two dimensional electron gas or two dimensional hole gas can be formed at the hetero-junction
Implementation Method 2
Two dimensional electron gas or two dimensional hole gas can be formed at the hetero-junction, and can be functioned as a conductive channel in HEMT
Data Source
AI summary
A high electron mobility transistor (HEMT) device and a manufacturing method thereof are provided. The HEMT device includes a channel layer, a barrier layer, a first gate electrode, a first drain electrode and a first source electrode. The channel layer is disposed on a substrate. A surface of a portion of the channel layer within a first region of the HEMT device includes a polar plane and a non-polar plane. The barrier layer is conformally disposed on the channel layer. The first gate electrode is disposed on the barrier layer, and located within the first region. The first drain electrode and the first source electrode are disposed within the first region, and located at opposite sides of the first gate electrode.


