3D IC Cascaded Power Planes Reduce IR Drop
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Solution Overview
Problem
Conventional integrated circuit (IC) architectures face challenges in reducing power loss and noise due to increased current flow as supply voltage is decreased, with existing methods failing to effectively manage leakage current and noise distribution across separate circuit regions.
Innovation Solution
A 3D IC structure with physically- and electrically-cascaded voltage supply planes, each corresponding to its own active semiconductor layer, allows capacitors and inductors to be placed proximal to current sources, reducing the need for capacitance and minimizing power loss and noise by isolating noise-generating circuits and balancing current distribution across active regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If supply voltage is decreased to advance IC state of the art, then power consumption is reduced, but current increases resulting in increased power loss and noise
Solution Approach 1:
The patent transitions from a conventional planar power distribution to a three-dimensional stacked architecture where multiple active layers are vertically arranged. Each layer has its own dedicated power supply plane, allowing power distribution in the vertical dimension. This 3D configuration reduces the current path length and resistance, thereby reducing IR drop and power loss while maintaining lower supply voltage operation.
Solution Approach 2:
The IC device is segmented into multiple independent active layers, each with its own power supply plane and decoupling capacitors. This segmentation allows each layer to be independently powered and optimized, reducing the total current that must flow through shared power paths. By dividing the power distribution into separate segments per layer, the patent minimizes cumulative IR drop and power loss.
2Stability of the object's composition
If separate conductive planes are used for multiple supply voltages, then voltage stability is improved, but capacitor placement is too far from circuits resulting in power loss due to distributed IR drop
Solution Approach 1:
The patent implements local quality by placing decoupling capacitors directly on each active layer's power supply plane, in immediate proximity to the circuits they serve. This local placement ensures that each circuit receives stable voltage with minimal IR drop, as the capacitors are positioned exactly where they are needed rather than being located remotely on shared power planes.
Solution Approach 2:
By utilizing the vertical stacking dimension, the patent enables capacitors to be placed on the same physical layer as the circuits they decouple. This eliminates the horizontal distance issue in planar designs and allows optimal local coupling between capacitors and circuits in the vertical z-dimension, minimizing IR drop while maintaining voltage stability.
3Object-affected harmful factors
If IC device is separated into dedicated regions for analog and digital sections, then noise isolation between regions is improved, but leakage current effects are not noticeably reduced
Solution Approach 1:
The patent segments the IC device into multiple active layers, where each layer can be dedicated to specific circuit types (analog, digital, mixed-signal). This vertical segmentation provides both noise isolation between functional regions and separate leakage current paths for each layer. By isolating leakage currents to individual layers rather than allowing them to converge on a single ground plane, the patent reduces cumulative leakage effects while maintaining noise isolation.
Solution Approach 2:
The patent moves from planar region separation to vertical layer separation, utilizing the z-dimension to isolate both noise and leakage currents. By stacking functional regions in separate layers with dedicated power and ground paths, the patent achieves superior isolation in both noise and leakage current management compared to traditional planar partitioning, as each layer operates independently with its own return path to ground.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces power loss and noise by enabling efficient power distribution, improved noise immunity, and reduced leakage current, while allowing for precise placement of decoupling capacitors to minimize IR drops and enhance capacitive decoupling.
Implementation Method 1
The IC structure may further include multiple capacitors, each of the capacitors being connected between a common ground plane in the IC structure and a respective one of the voltage supply planes
Implementation Method 2
reducing power lost, for example, to IR heating
Implementation Method 3
reducing power lost, for example, to inductive noise (Ldi/dt) which is proportional to the current in the device
Data Source
AI summary
An IC structure having reduced power loss and/or noise includes two or more active semiconductor regions stacked in a substantially vertical dimension, each active semiconductor region including an active layer. The IC structure further includes two or more voltage supply planes, each of the voltage supply planes corresponding to a respective one of the active layers.