3D IC Contact Structures for Reduced Interconnect Footprint
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Solution Overview
Problem
Integrated circuit (IC) devices face challenges in reducing the x-y footprint of connections between upper and lower transistors, leading to increased area consumption and decreased transistor density, especially in three-dimensional device settings where vertical connections are necessary.
Innovation Solution
The development of IC contact structures that include a metal layer conductively coupling semiconductor material and electrical elements, either through epitaxial growth or doping, allowing for vertical and lateral connections that reduce the footprint and enhance transistor density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If vertical connections are used between upper and lower transistors, then the x-y footprint is reduced, but the manufacturing complexity increases
Solution Approach 1:
The patent transitions from horizontal planar connections to vertical three-dimensional connections by forming contact structures that extend through dielectric layers to connect upper and lower transistor layers, thereby reducing the x-y footprint while managing the associated manufacturing complexity through structured process design
Solution Approach 2:
The contact structures are formed by nesting multiple layers of conductive materials within dielectric layers, creating a hierarchical structure where metal contacts are embedded within insulating materials, which are in turn embedded within the three-dimensional transistor architecture, enabling compact vertical integration
2Ease of manufacture
If conventional horizontal connections are used, then the manufacturing process is simpler, but the transistor density decreases
Solution Approach 1:
The invention moves from two-dimensional planar interconnects to three-dimensional vertical interconnects, allowing multiple transistor layers to be stacked vertically with compact footprints, thereby increasing transistor density while maintaining manufacturability through adapted fabrication processes
Solution Approach 2:
The manufacturing process is segmented into distinct stages: forming recesses in dielectric layers, depositing conductive materials, and planarizing surfaces, allowing each step to be optimized independently while achieving the overall goal of high-density vertical integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
These structures effectively minimize the x-y footprint of connections, increasing transistor density and improving device performance by providing efficient pathways between upper and lower transistors in three-dimensional IC devices.
Implementation Method 1
a metal that conductively couples the semiconductor material and the electrical element
Implementation Method 2
The semiconductor material may be grown on the metal
Data Source
AI summary
Disclosed herein are integrated circuit (IC) contact structures, and related devices and methods. For example, in some embodiments, an IC contact structure may include an electrical element, a metal on the electrical element, and a semiconductor material on the metal. The metal may conductively couple the semiconductor material and the electrical element.