3D IC MIM Capacitor Layout for Early Power Path Decoupling

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Solution Overview

Problem

Existing decoupling capacitors in 3D IC devices are not effectively utilized, leading to unfiltered or minimally filtered signals due to certain signal lines bypassing the capacitors, resulting in noise, voltage bias fluctuation, and current resistance issues.

Innovation Solution

Integrate multi-layer MIM capacitors closer to the input power signals in 3D IC structures, forming them along power signal paths to ensure coupling before reaching the devices, and incorporate region-specific capacitors to filter signals specific to top or bottom devices or between them.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If decoupling capacitors are integrated in 3D IC devices, then capacitance density is improved, but signal filtering effectiveness deteriorates because certain signal lines bypass the capacitors

Engineering Contradiction:
Improvecapacitance densityVSAvoidsignal filtering effectiveness
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent implements different interconnect structures for different signal paths. Power signal lines are routed through the MIM capacitor to enable filtering, while other signal lines maintain direct connections. This local differentiation ensures that capacitors effectively filter power signals without impeding other signal paths, resolving the contradiction between high capacitance density and effective signal filtering.

Inventive Principle:
Principle #3Local quality

2Device complexity

If MIM capacitors are positioned away from input power signals, then device complexity is reduced, but noise filtering and voltage stabilization effectiveness deteriorate

Engineering Contradiction:
Improvecapacitor positioning complexityVSAvoidnoise and voltage fluctuation
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The MIM capacitors are positioned and connected to intercept power signals early in their path, before the signals reach the devices. This preliminary filtering action removes noise and stabilizes voltage at the source, preventing harmful fluctuations from propagating through the system. The capacitors are strategically placed in the power distribution network to maximize their filtering effectiveness while maintaining manageable device complexity.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Effectively filters noise and decouples current spikes, voltage bias fluctuations, and resistance drops by ensuring MIM capacitors are positioned to intercept signals early in their path, improving signal quality and device performance.

Implementation Method 1

forming metal-insulator-metal (MIM) capacitor structures in the IC passivation layer

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS12532761B2MIM capacitor in IC heterogenous integration
Publication Date: 2026.01.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12532761B2 patent drawing
  • US12532761B2 patent drawing
  • US12532761B2 patent drawing

AI summary

One aspect of the present disclosure pertains to a method. The method includes receiving a first circuit structure having semiconductor devices, an interconnect structure, first feedthrough vias, top metal lines, redistribution vias, and bond pads. The method includes dicing the first circuit structure to form a top die having a top semiconductor device. The method includes forming a stacked integrated circuit (IC) structure by bonding the top die to a second circuit structure, the second circuit structure having second semiconductor devices, a second interconnect structure, second redistribution vias, and second bond pads. The method includes forming IC top metal lines over the first feedthrough vias, forming an IC passivation layer over the IC top metal lines, forming metal-insulator-metal (MIM) capacitor structures in the IC passivation layer, and forming IC redistribution vias penetrating through the MIM capacitor structures and the IC passivation layer to land on the IC top metal lines.