3D IC Misalignment Detection via Capacitance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Misalignment during chip-to-chip or wafer-to-wafer bonding in 3D integrated circuits leads to shorts or interconnection opens, reducing reliability and increasing manufacturing costs.
Innovation Solution
A 3D integrated circuit structure with detection structures on semiconductor substrates, comprising conductors arranged in specific configurations to form capacitors, allowing for the detection of misalignment by measuring capacitance differences between bonded chip structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If chip-to-chip or wafer-to-wafer bonding is performed in 3D integrated circuits, then integration density and functionality are improved, but misalignment occurs causing shorts or interconnection opens which reduces reliability
Solution Approach 1:
The patent applies preliminary action by forming detection structures (conductor patterns) on the chip surfaces before bonding occurs. These structures are pre-positioned to enable alignment detection, allowing misalignment to be identified and corrected before final interconnection is made, thus preventing reliability issues while maintaining high integration density
Solution Approach 2:
The detection structures serve as an intermediary element between the bonding process and quality assurance. By introducing these conductor patterns as a mediating component, the system can measure alignment accuracy through capacitance measurements, enabling precise control of the bonding process to achieve both high integration and reliability
2Device complexity
If misalignment detection is not implemented, then manufacturing process complexity is reduced, but shorts or interconnection opens occur significantly reducing reliability
Solution Approach 1:
The detection structures utilize the existing conductor layers and interconnection structures already present in the 3D IC architecture. The capacitance measurement system leverages these existing components to perform alignment detection, making the detection system self-contained and eliminating the need for separate external alignment equipment, thus achieving high reliability without significant complexity increase
Solution Approach 2:
The conductor structures serve dual functions: they act as both interconnection elements for signal transmission and as detection structures for alignment measurement. This multi-functionality allows the same physical structures to support both the functional requirements of the circuit and the quality assurance requirements, avoiding additional complexity while ensuring reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Accurately detects and quantifies misalignment between chip structures, enabling precise alignment and improving the reliability and efficiency of 3D integrated circuit manufacturing.
Implementation Method 1
the fourth conductor can be electrically connected with at least one of the third conductors so as to form a capacitor with the second conductors
Data Source
AI summary
The present application discloses a 3D integrated circuit structure and a method for detecting whether there is misalignment between chip structures. The circuit structure comprises a first chip structure which comprises a first semiconductor substrate, a first insulating layer, and a first detection structure; the first detection structure comprises detection bodies positioned on two sides of the first insulating layer, the detection body comprising a first conductor, at least two second conductors, and at least one third conductors; wherein the first conductor is located on a side of the first insulating layer and connected with ends of the second conductors; the third conductors are formed between the second conductors and insulated from the second conductors, and the first ends of the third conductors away from the first conductor are step-wise; wherein vertical distances between the third conductors and the second conductors are equal, and in the direction of the length of the third conductors, the distances between the projections of the ends of the third conductors away from the first conductor which are corresponding to each other and located on the detection bodies on the two sides are substantially the same. The present invention is suitable for optimizing the alignment between the chip structures in manufacture of integrated circuits.