3D IC Package Layout for Optical Isolation and Heat Dissipation
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Solution Overview
Problem
Existing semiconductor packaging technologies face challenges in minimizing distances between peripheral dies and a central system die, reducing optical interference, and enhancing heat dissipation efficiency, while maintaining high performance and energy efficiency.
Innovation Solution
The package structure includes an interposer bonded to a package substrate, with photonic and memory structures bonded to it, and a system die disposed over these, partially overlapping them. A heat spreader is attached to dissipate heat, and optical couplers are used for efficient signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If peripheral chips are brought closer to the center system-on-chip to minimize distances, then electrical signal transmission speed is improved, but optical interference increases
Solution Approach 1:
The patent introduces an interposer as an intermediary component between the system die and peripheral dies. This interposer provides a dedicated substrate with through-silicon vias (TSVs) and redistribution layers that mediate the electrical connections, allowing peripheral dies to be positioned closer to the system die while maintaining signal integrity and reducing optical interference through controlled impedance pathways.
Solution Approach 2:
The patent transitions from planar 2D packaging to three-dimensional stacking architecture. By utilizing vertical dimension with multiple layers of dies stacked above the interposer, the design achieves edge-to-edge connections in 3D space, minimizing electrical signal paths while separating optical pathways to reduce interference.
2Quantity of substance
If edge-to-edge 3D connections are achieved to improve area utilization, then chip density increases, but heat dissipation becomes more challenging
Solution Approach 1:
The patent segments the heat dissipation function from the electrical interconnection function by introducing a dedicated heat spreader layer and thermal via structures. The interposer is divided into functional regions with thermal management features, allowing heat to be conducted vertically through TSVs and spread laterally through the heat spreader, independent of the electrical signal pathways.
Solution Approach 2:
The patent introduces a heat spreader as a thermal intermediary between the stacked dies and the substrate. This heat spreader acts as a thermal management mediator that collects heat from multiple high-density dies and distributes it across a larger area, preventing localized thermal accumulation despite the high chip density achieved through 3D stacking.
3Productivity
If optical chips are integrated with electronic chips to achieve high speed transmission, then communication efficiency improves, but optical interference between adjacent structures increases
Solution Approach 1:
The patent applies local quality by providing dedicated optical coupling structures at specific locations on the interposer where optical chips interface with electronic chips. These localized optical vias and coupling regions are designed with specific optical properties (such as reflective or transmissive characteristics) to enable efficient optical signal transmission only at the required interface points, while surrounding areas maintain electrical isolation and prevent optical crosstalk.
Solution Approach 2:
The patent separates optical and electrical pathways by utilizing different spatial dimensions. Optical signals are transmitted through vertical vias and dedicated optical pathways in the Z-dimension, while electrical connections are routed through the interposer plane in the XY-dimension. This dimensional separation allows high-speed optical communication between stacked layers while preventing optical interference with adjacent electrical structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration minimizes electrical signal travel distances, maximizes optical signal travel distances, and improves performance and energy efficiency by reducing optical interference and enhancing heat dissipation.
Implementation Method 1
A heat spreader is attached to dissipate heat
Implementation Method 2
optical couplers are used for efficient signal transmission
Data Source
AI summary
A package substrate according to the present disclosure includes a package substrate, an interposer disposed over the package substrate, a photonic die disposed over the interposer, a memory structure disposed over the interposer and including a controller die, a system die disposed over the interposer and partially overlapping with the photonic die and the controller die, and a lid covering the system die, the memory structure, and photonic die. The system die includes micro bumps extending from a bottom surface of the system die to a top surface of the controller die.