3D IC Test Networking Structure for Parallel Die Verification
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Design-for-Test (DFT) in the semiconductor industry faces challenges with lengthy testing times due to the need to check large numbers of individual components and nodes, where an open circuit in a serial chain can halt further testing, making it inefficient and time-consuming.
Innovation Solution
A test apparatus with a networking structure that includes a test master, networking die, and stacked dies, utilizing conductive circuit traces on an interposer and network interfaces to enable parallel testing of interconnections between dies, allowing the test master to issue commands to multiple dies simultaneously without waiting for previous tests to complete, thereby reducing overall testing time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If serial testing is used to check individual components and nodes, then testing thoroughness is improved, but testing time increases significantly
Solution Approach 1:
The patent divides the testing system into multiple independent testing channels, each capable of testing different dies simultaneously. The interposer is segmented into multiple conductive trace sets that can independently carry test signals to different die stacks, enabling parallel execution of tests that were previously performed serially.
Solution Approach 2:
The patent combines multiple testing operations into a single integrated system where the test master controller coordinates simultaneous tests across multiple dies. By merging the testing of multiple dies into one unified parallel process, the system achieves thorough testing without the time penalty of sequential testing.
2Reliability
If serial chain testing is used, then complete circuit verification is achieved, but an open circuit halts further testing
Solution Approach 1:
The testing architecture is segmented into multiple independent testing paths through the interposer. Each path can be independently controlled and evaluated, so that an open circuit or failure in one path does not propagate to halt testing in other paths. This isolation allows continuous testing across all segments despite individual failures.
Solution Approach 2:
The interposer acts as an intermediary substrate between the test master and multiple dies, providing independent conductive trace pathways. This intermediary structure enables the test master to route test signals through separate paths to different dies, ensuring that failures in one path do not affect other paths and allowing testing to continue efficiently.
3Adaptability or versatility
If multiple I/O pads are used on each die for testing, then testing capability is improved, but device complexity increases
Solution Approach 1:
The interposer serves as an intermediary that provides the additional testing infrastructure without adding complexity to the dies themselves. The conductive traces and routing are implemented in the interposer substrate, allowing multiple testing paths while keeping each die relatively simple with fewer required I/O pads.
Solution Approach 2:
The patent moves the testing complexity from the vertical dimension (multiple pads on each die) to the horizontal dimension (multiple paths through the interposer). By utilizing the interposer plane as an additional dimension for routing and signal distribution, the system achieves enhanced testing capability without increasing the pad count on individual dies.
Data Source
AI summary
An apparatus comprises a die comprising a plurality of switch/router circuits; and a plurality of additional dies. Each respective one of the plurality of additional dies comprises: a respective network interface, which is electrically coupled to a respective one of the plurality of switch/router circuits; and a respective interconnection test logic, which is electrically coupled to the respective network interface and the interconnection test logic in at least one other one of the plurality of additional dies.