3D Inductor Structure for Smaller RF Circuit Area and Higher Q
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Solution Overview
Problem
Conventional inductors in radio frequency circuits occupy large areas, hindering size reduction and increasing manufacturing costs in communication devices.
Innovation Solution
A semiconductor device with a three-dimensional inductor structure comprising a substrate, a front conductive stack, a back conductive layer, and through-hole structures that electrically connect them, allowing for a smaller circuit area and enhanced inductance characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If a conventional planar inductor structure is used, then the inductance value can be achieved, but the circuit area occupied is large
Solution Approach 1:
The patent transitions from a conventional planar (2D) inductor structure to a three-dimensional structure by adding vertical stacking of conductive layers. The front conductive stack includes multiple conductive layers (first conductive layer, second conductive layer, third conductive layer) stacked vertically, with through-hole structures penetrating the substrate to provide electrical connections. This 3D configuration achieves the required inductance value within a smaller footprint area while maintaining or improving the quality factor through optimized current paths and reduced parasitic effects.
2Reliability
If the thickness of the second conductive layer is increased to reduce eddy currents, then the quality factor improves, but the manufacturing complexity increases
Solution Approach 1:
The patent specifies precise parameter ranges for the conductive layers to optimize performance while maintaining manufacturability. The second conductive layer thickness is controlled within 30-400 micrometers, and the ratio of the second conductive layer thickness to the first conductive layer thickness is maintained between 6-80. These parameter specifications enable quality factor improvement through reduced eddy currents while keeping the manufacturing process within standard capabilities for Group III-V semiconductor fabrication.
Data Source
AI summary
A semiconductor device may include a compound substrate and a 3-dimensional inductor structure. The compound substrate may include a front surface and a back surface. The 3-dimensional inductor structure may include a front conductive stack, a back conductive layer, and at least one through-hole structure. At least one portion of the front conductive stack may include a first conductive layer disposed on the front surface of the compound substrate, and a second conductive layer disposed on the first conductive layer. The second conductive layer has a thickness ranging between 30 micrometers and 400 micrometers. The back conductive layer is disposed on the back surface of the compound substrate. The at least one through-hole structure penetrates through the compound substrate, and electrically connects the front conductive stack to the back conductive layer.