3D Inductor Carrier With Metal Core Reduces Parasitic Capacitance

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Solution Overview

Problem

Conventional planar inductors face challenges with parasitic capacitance, limiting chip size reduction and coil density, and lack of a toroid structure, which restricts magnetic flux direction and electro-magnetic coupling in flip chip modules.

Innovation Solution

A method for fabricating a three-dimensional inductor carrier with a metal core, involving multiple metal and dielectric layers, and photoresist patterning to create a 3D structure that reduces chip size, increases coil density, and alters magnetic flux direction from normal to horizontal, enhancing electro-magnetic coupling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a planar inductor structure is used, then the manufacturing process is simple, but the chip size cannot be decreased due to parasitic capacitance disturbance

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidchip size
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent transitions from a two-dimensional planar inductor structure to a three-dimensional structure by stacking multiple metal layers (first metal layer, second metal layer, third metal layer) separated by dielectric layers. This vertical stacking enables the inductor to achieve higher coil density and reduced parasitic capacitance effects while maintaining a smaller footprint area on the chip.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If a planar inductor structure is used, then the layout is simple, but the coil density is limited

Engineering Contradiction:
Improvelayout simplicityVSAvoidcoil density
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent implements nested inductor structures where multiple inductor windings are stacked vertically across different metal layers. The first, second, and third metal layers each contain inductor portions that are nested one above another, effectively increasing the coil density by utilizing the vertical dimension while maintaining a compact horizontal footprint.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Device complexity

If a planar inductor structure is used, then the structure is simple, but the magnetic flux direction is restricted to normal direction

Engineering Contradiction:
Improvestructural complexityVSAvoidmagnetic flux direction control
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent introduces vertical stacking of metal layers to create three-dimensional inductor structures, which enable magnetic flux to flow in multiple directions including horizontal and vertical components. This dimensional transition allows the inductor to support both normal and horizontal magnetic flux directions, enhancing adaptability for different electromagnetic coupling requirements in flip chip modules.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Area of stationary object

If a three-dimensional inductor carrier with metal core is fabricated, then the chip size is reduced and coil density is increased, but the manufacturing process complexity increases

Engineering Contradiction:
Improvechip sizeVSAvoidmanufacturing process complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent divides the inductor structure into multiple discrete metal layers (first, second, and third metal layers) separated by dielectric layers, with each layer containing specific inductor portions. This segmentation allows for systematic fabrication through sequential patterning and deposition steps, making the complex three-dimensional structure manufacturable through standardized semiconductor processing techniques.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8513772B2Method for fabricating a three-dimensional inductor carrier with metal core and structure thereof
Publication Date: 2013.08.20 CHIPBOND TECH
  • US8513772B2 patent drawing
  • US8513772B2 patent drawing
  • US8513772B2 patent drawing

AI summary

A method for fabricating a inductor carrier comprises the steps of providing a substrate with a protective layer; forming a first photoresist layer on protective layer; patterning the first photoresist layer to form a first opening and first apertures; forming a first metal layer within first opening and first apertures; removing the first photoresist layer; forming a first dielectric layer on protective layer; forming a second photoresist layer on first dielectric layer; patterning the second photoresist layer to form a second aperture and a plurality of third apertures; forming a second metal layer within second aperture and third apertures; removing the second photoresist layer; forming a second dielectric layer on first dielectric layer; forming a third photoresist layer on second dielectric layer; patterning the third photoresist layer to form a fifth aperture and sixth apertures; forming a third metal layer within fifth aperture and sixth apertures.