3D Integrated Circuit Capacitor Design for High Voltage
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Solution Overview
Problem
Existing integrated circuit capacitors face challenges in achieving sufficient capacitance within a limited area or volume, especially in higher voltage applications, and current two-dimensional architectures are limited in their ability to scale with advancing technology.
Innovation Solution
A three-dimensional integrated circuit capacitor design is developed, featuring multiple conductors and insulating regions, allowing for increased capacitance by extending the path through the insulating dielectric in multiple directions, and can be integrated into a three-polysilicon process to form a floating gate bitcell, enhancing capacitance/area ratio and enabling higher voltage applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If two-dimensional capacitor architecture is used, then manufacturing simplicity is maintained, but capacitance/area ratio is insufficient
Solution Approach 1:
The patent transitions from two-dimensional planar capacitor architecture to three-dimensional architecture by stacking multiple conductive plates (first through fourth conductors) separated by insulating regions. This vertical stacking extends the capacitor structure in the third dimension (depth), increasing the effective capacitance/area ratio from conventional 2D layouts without complicating the manufacturing process, as the structure can be formed using standard semiconductor fabrication techniques.
2Area of stationary object
If capacitor size is reduced to fit limited area, then area utilization improves, but sufficient capacitance cannot be achieved
Solution Approach 1:
The patent implements a nested structure where multiple conductive plates are stacked vertically with insulating regions between them, creating a compact three-dimensional capacitor. This nesting approach allows the capacitor to achieve sufficient total capacitance within a limited footprint area by utilizing vertical space, effectively nesting multiple capacitive elements one above another rather than spreading them out horizontally.
3Quantity of substance
If three-dimensional capacitor architecture is implemented, then capacitance/area ratio increases, but device complexity increases
Solution Approach 1:
The patent divides the capacitor into segmented components: multiple discrete conductive plates (first, second, third, and fourth conductors) separated by distinct insulating regions. This segmentation allows each layer to be formed using separate fabrication steps, making the three-dimensional structure manageable and compatible with existing semiconductor manufacturing processes while achieving higher capacitance density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The three-dimensional capacitor design achieves a higher capacitance/area ratio compared to two-dimensional capacitors, with a capacitance/area ratio of approximately 3.6 fF/μm², which is 20% higher than existing two-dimensional MOSCAPs, and can support voltages up to 10V, while also being scalable for further technological advancements.
Implementation Method 1
The capacitor includes a first conductor and a first insulating region between the first conductor and the substrate. The capacitor also includes a second conductor, a second insulating region between the first conductor and the second conductor
Implementation Method 2
extending the path through the insulating dielectric in multiple directions
Data Source
AI summary
An integrated circuit capacitor. The capacitor includes a substrate, a first conductor, and a first insulating region between the first conductor and the substrate. The capacitor also includes a second conductor, a second insulating region between the first conductor and the second conductor, a third conductor, and a third insulating region between the first conductor and the third conductor. The capacitor also includes a fourth conductor and a fourth insulating region between the first conductor and the fourth conductor.