3D Integrated Capacitor Sidewall Structure

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Solution Overview

Problem

Integrated capacitors in circuits require significant substrate area for high capacitance, and reducing dielectric thickness to increase capacitance lowers the maximum voltage that can be stored, which is limited by minimum breakdown voltage requirements.

Innovation Solution

The development of three-dimensional capacitor structures that exploit capacitance in a plane perpendicular to the substrate, allowing for higher capacitance over small substrate areas, suitable for use in charge pumps and fabricated to meet specific capacitance needs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the substrate area is reduced to minimize integrated circuit area, then area efficiency is improved, but capacitance decreases

Engineering Contradiction:
Improvesubstrate areaVSAvoidcapacitance
Core Design Contradiction:
Area of stationary objectVSQuantity of substance

Solution Approach 1:

The patent transitions from planar (2D) capacitor structures to three-dimensional (3D) capacitor structures by forming vertical sidewall capacitors. The dielectric layer is conformally deposited on the sidewalls of trench structures, creating capacitance in the vertical dimension perpendicular to the substrate. This dimensional change allows significantly higher capacitance density within the same substrate footprint, directly resolving the contradiction between minimizing substrate area and maintaining high capacitance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If dielectric thickness is decreased to increase capacitance, then capacitance increases, but maximum voltage storage capability decreases

Engineering Contradiction:
ImprovecapacitanceVSAvoidmaximum voltage storage capability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

By forming capacitors on vertical sidewalls rather than using thin horizontal dielectric layers, the patent achieves high capacitance through increased surface area in the vertical dimension. The dielectric thickness can be optimized for voltage withstand capability while the vertical sidewall geometry provides the necessary capacitance, thus resolving the contradiction between capacitance and voltage storage capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent embeds the dielectric layer within vertical trench structures, nesting the capacitive element within the sidewall geometry. This nested configuration allows the dielectric to be positioned where it can provide both sufficient thickness for voltage breakdown protection and adequate surface area for high capacitance, simultaneously achieving both contradictory goals.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the creation of high-capacitance integrated capacitor structures that require less substrate area while maintaining or increasing voltage storage capabilities, suitable for applications like charge pumps.

Implementation Method 1

the integrated capacitor structures exploit the capacitance that can be formed in a plane that is perpendicular to that of the substrate

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS10141393B1Three dimensional capacitor
Publication Date: 2018.11.27 INFINEON TECHNOLOGIES LLC
  • US10141393B1 patent drawing
  • US10141393B1 patent drawing
  • US10141393B1 patent drawing

AI summary

Integrated capacitor structures and methods for fabricating same are provided. In an embodiment, the integrated capacitor structures exploit the capacitance that can be formed in a plane that is perpendicular to that of the substrate, resulting in three-dimensional capacitor structures. This allows for integrated capacitor structures with higher capacitance to be formed over relatively small substrate areas. Embodiments are suitable for use by charge pumps and can be fabricated to have more or less capacitance as desired by the application.