3D Integrated Inductor Structure for On-Die Power Management
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Solution Overview
Problem
Integrated circuit (IC) dies face challenges in incorporating inductors due to their size and integration with other components, as traditional methods struggle to form passive components like inductors on the die, leading to a need for innovative solutions that enable effective on-die voltage regulation and power management.
Innovation Solution
The solution involves forming inductance structures that span multiple metallization layers of an IC die and a coupled circuit device, allowing for larger loop structures and increased z-dimension height, which are fabricated using conventional semiconductor processes and materials like copper, silver, and gold, with optional ferromagnetic materials to enhance magnetic permeability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If inductors are formed outside the IC die on a package substrate, then inductor quality and size are improved, but device integration and space efficiency deteriorate
Solution Approach 1:
The patent merges the inductor structure with the IC die by forming conductive loop portions directly on the die using metallization layers, eliminating the need for separate package substrate mounting. This combines previously separate components (inductor and IC die) into a single integrated structure, resolving the contradiction between inductor quality and device integration.
Solution Approach 2:
The patent utilizes the z-dimension (vertical dimension) by forming multi-layer metallization structures with conductive loop portions that extend through multiple metallization layers. This three-dimensional approach allows larger inductor loop areas without increasing planar footprint, enabling high-quality inductors to be formed on-die rather than on separate substrates.
2Area of stationary object
If inductors are formed on the IC die, then space efficiency and integration are improved, but inductor size and quality deteriorate
Solution Approach 1:
The patent forms conductive loop portions that span multiple metallization layers in the vertical z-dimension, creating three-dimensional inductor structures. This allows the inductor loop area to extend vertically rather than only horizontally, achieving larger effective inductor area within the limited planar space of the IC die, thus maintaining inductor quality while improving space efficiency.
Solution Approach 2:
The inductor structure is nested within the IC die by forming conductive loop portions using the existing metallization layers of the die. The inductor loops are embedded within and integrated with the die's interconnect structure, allowing the inductor to occupy space that would otherwise be unused or minimally utilized, thereby achieving high inductor quality within the constrained die area.
3Ease of manufacture
If conventional semiconductor processes are used to form inductors, then manufacturing ease and cost are improved, but inductor performance and magnetic permeability deteriorate
Solution Approach 1:
The patent combines conventional semiconductor manufacturing processes with inductor formation by using standard metallization deposition and patterning techniques to create conductive loop portions. The inductor structure is formed using the same copper, silver, or gold metallization layers already present in the IC die, eliminating the need for separate inductor fabrication processes while maintaining manufacturing ease and cost-effectiveness.
Solution Approach 2:
The patent employs composite material structures by forming inductor loops using conventional metallization materials (copper, silver, gold) combined with optional ferromagnetic materials to enhance magnetic permeability. This composite approach allows the inductor to benefit from the electrical conductivity of metals while gaining improved magnetic properties, thereby enhancing inductor performance without requiring entirely new manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of inductors with improved inductance and magnetic permeability characteristics, facilitating more efficient power management and voltage regulation on the IC die, aligning with the demands of smaller scales and higher integration in semiconductor fabrication.
Implementation Method 1
with optional ferromagnetic materials to enhance magnetic permeability
Data Source
AI summary
Techniques and mechanisms for providing an inductor with an integrated circuit (IC) die. In an embodiment, the IC die comprises integrated circuitry and one or more first metallization layers. The IC die is configured to couple to a circuit device including one or more second metallization layers, where such coupling results in the formation of an inductor which is coupled to the integrated circuitry. One or more loop structures of the inductor each span both some or all of the one or more first metallization layers and some or all of the one or more second metallization layers. In another embodiment, the IC die or the circuit device includes a ferromagnetic material to concentrate a magnetic flux which is provided with the inductor.