3D Integrated Circuit Laser Crystallization Heat Management
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Solution Overview
Problem
The challenge in fabricating three-dimensional integrated circuits with multiple layers lies in achieving high-quality single crystal silicon for upper layers without detrimental heat transfer to lower layers, as conventional methods like heat annealing and separate die fabrication face difficulties due to heat transfer issues and lack of cost-effective alignment techniques.
Innovation Solution
A controlled laser crystallization process is used to form single crystal silicon for upper layers, where an amorphous layer is created, a crystallization area is defined, and a laser is applied to prevent heat transfer to lower layers, allowing for precise crystallization without damaging existing components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional heat annealing is used to create single crystal regions in the second layer, then single crystal quality can be achieved, but heat transfers to the first layer causing detrimental effects
Solution Approach 1:
The patent replaces conventional thermal annealing with a laser-based crystallization process. The laser provides localized energy to transform amorphous silicon to single crystal silicon in the second layer without heating the first layer, thus substituting a mechanical/thermal system with a focused electromagnetic energy system that offers precise spatial control.
Solution Approach 2:
The laser crystallization process applies energy locally to specific regions of the second layer where single crystal formation is needed. This localized treatment ensures that only the targeted amorphous regions are converted to single crystal, while surrounding areas and underlying layers remain unaffected, achieving local quality improvement without global thermal effects.
2Adaptability or versatility
If more components are included in an integrated circuit to satisfy greater functionality demands, then functionality increases, but manufacturing precision becomes increasingly difficult to achieve
Solution Approach 1:
The patent transitions from planar (2D) integration to three-dimensional (3D) integration by stacking multiple device layers vertically. This dimensional change allows components to be arranged in the third dimension (depth), increasing component density and functionality without compromising the manufacturing precision of individual layers, as each layer can be processed independently with the laser crystallization technique.
3Ease of manufacture
If separate dies are fabricated and then combined to create multilayer structures, then layer fabrication can proceed independently, but alignment precision is compromised due to lack of cost-effective alignment techniques
Solution Approach 1:
The patent merges the fabrication process of multiple layers into a single integrated process. Instead of fabricating separate dies and assembling them (which requires precise alignment), the laser crystallization process is applied in-situ within the stacked structure, allowing layers to be formed and processed together, thereby eliminating the alignment step while maintaining independent layer fabrication capabilities.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the fabrication of densely packed three-dimensional integrated circuits with multiple layers, minimizing heat transfer impacts and achieving reliable single crystal silicon formation for improved device performance.
Implementation Method 1
applying laser to the crystallization area, wherein the laser is applied in a manner that prevents undesired heat transfer to another layer
Implementation Method 2
defining a crystallization area in the amorphous layer, where in the crystallization area is defined to prevent undesired heat transfer to another layer
Data Source
AI summary
A semiconductor fabrication system and method are presented. A three dimensional multilayer integrated circuit fabrication method can include forming a first device layer and forming a second device layer on top of the first device layer with minimal detrimental heat transfer to the first layer by utilizing a controlled laser layer formation annealing process. A controlled laser crystallization process can be utilized and the controlled laser can include creating an amorphous layer; defining a crystallization area in the amorphous layer, where in the crystallization area is defined to promote single crystal growth (i.e. prevent multi-crystalline growth); and applying laser to the crystallization area, wherein the laser is applied in a manner that prevents undesired heat transfer to another layer.