3D Lateral-Plate Capacitor Structure for High Capacitance Density

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Solution Overview

Problem

There is a need to miniaturize capacitors while maintaining significant capacitance for small dimensions, which existing technologies have not effectively addressed.

Innovation Solution

The solution involves a capacitor design with an assembly of metal pads and plates, where a first insulating layer and a second conductive layer are conformally applied, with the pads and plates made of the same material, and the use of atomic layer deposition for forming these layers, allowing for efficient capacitance in compact form factors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional capacitor designs are used, then manufacturing is simpler, but capacitance density is insufficient for miniaturized devices

Engineering Contradiction:
Improvecapacitance densityVSAvoidcapacitor structure
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent transitions from planar capacitor plates to vertically stacked three-dimensional plates, utilizing the vertical dimension to increase capacitance density. Multiple plates are stacked above each other between common pads, effectively using spatial volume rather than just surface area to achieve higher capacitance in a compact footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The capacitor structure employs nested insulation layers where a first insulation layer is conformally deposited between the plates, and a second insulation layer is deposited over the first layer. This nested configuration provides electrical isolation while maximizing the use of available space within the capacitor structure.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Volume of moving object

If capacitor size is reduced for miniaturization, then device integration improves, but capacitance value decreases

Engineering Contradiction:
Improvecapacitor volumeVSAvoidcapacitance value
Core Design Contradiction:
Volume of moving objectVSQuantity of substance

Solution Approach 1:

By stacking multiple capacitor plates vertically in the third dimension, the patent achieves high capacitance values within a small planar footprint. The vertical stacking allows multiple capacitance elements to be combined in series or parallel configurations, maintaining total capacitance while reducing the device's horizontal volume occupation.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent employs composite material structures with plates made of conductive materials and insulation layers made of dielectric materials. This composite approach allows optimization of each material's properties for its specific function, achieving high capacitance density while maintaining electrical isolation and mechanical stability in a miniaturized structure.

Inventive Principle:
Principle #40Composite materials

3Quantity of substance

If conformal insulation layers are added to increase capacitance density, then manufacturing complexity increases

Engineering Contradiction:
Improvecapacitance densityVSAvoidlayer deposition process
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The conformal insulation layers are deposited using atomic layer deposition (ALD) technology, which automatically conforms to the underlying plate structures and fills gaps uniformly. This self-adjusting deposition process eliminates the need for complex masking and alignment steps, as the insulation material naturally follows the topography of the capacitor plates, simplifying manufacturing despite the increased structural complexity.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enables the creation of capacitors with high capacitance in small dimensions, effectively addressing the challenge of miniaturization by ensuring efficient electrical coupling and insulation, thereby enhancing the performance of electronic devices.

Implementation Method 1

forming the first insulating layer and the second conductive layer by an atomic layer deposition method

Methodology Applied
Scientific EffectAtomic layer deposition: Physical Vapour Deposition

Data Source

PatentUS20230290813A1Capacitor including lateral plates and method for forming a capacitor
Publication Date: 2023.09.14 STMICROELECTRONICS (CROLLES 2) SAS
  • US20230290813A1 patent drawing
  • US20230290813A1 patent drawing
  • US20230290813A1 patent drawing

AI summary

A device includes at least one capacitor. The capacitor includes an assembly of two metal pads and at least two metal plates, each plate extending at least from one pad to the other, a first insulating layer conformally covering said assembly, a second conductive layer conformally covering the first layer.