3D Semiconductor Layer Stack Replacement Using Spin-On Sacrificial Films
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Solution Overview
Problem
The fabrication of 3D semiconductor structures, particularly 3D VNAND memory devices, faces challenges such as high manufacturing costs, wafer bowing, and stress-induced defects due to repeated plasma deposition processes, which affect device performance and precision in lithography overlay.
Innovation Solution
The use of spin-on deposition techniques to form an initial layer stack of sacrificial materials, which are then removed and replaced with desired layers using solubility-changing agents generated by thermal acid generators, allowing for efficient etching of openings and reducing stress on the wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If repeated plasma deposition processes are used to form layer stacks in 3D semiconductor structures, then the desired material layers can be formed, but manufacturing costs increase and wafer stress/defects occur
Solution Approach 1:
The patent applies preliminary action by forming a sacrificial layer stack using spin-on deposition before the final material layers are deposited. This initial layer stack serves as a template that guides subsequent etching and deposition processes, eliminating the need for repeated plasma deposition and reducing manufacturing costs while maintaining device integrity.
Solution Approach 2:
The patent uses a sacrificial layer stack as an intermediary element. This temporary structure is formed using low-cost spin-on deposition, then used to define the final structure through selective removal and replacement processes, thereby avoiding expensive repeated plasma deposition while ensuring precise material placement.
2Reliability
If repeated plasma deposition processes are used to form layer stacks, then material layers are formed, but wafer bowing and stress-induced defects increase
Solution Approach 1:
The sacrificial layer stack is formed in advance using spin-on deposition, which is a low-stress process compared to repeated plasma deposition. This preliminary structure then guides the formation of final layers with minimal additional stress, preventing wafer bowing and stress-induced defects while maintaining device performance.
3Productivity
If fine patterning technology is used to form 2D memory cells, then integration density improves, but processing equipment expense increases
Solution Approach 1:
The patent transitions from 2D planar memory cell formation to 3D vertically-stacked structures. By using spin-on deposition to create sacrificial layer stacks that are then selectively removed and replaced, the method achieves high integration density through vertical stacking without requiring expensive fine patterning equipment, effectively moving the solution to another dimension.
4Ease of manufacture
If spin-on deposition with sacrificial layers is used, then manufacturing cost decreases, but process complexity increases
Solution Approach 1:
The patent merges multiple functions into the sacrificial layer stack formation process. The spin-on deposition step simultaneously creates the sacrificial structure that defines subsequent etching patterns and serves as a template for final material deposition, consolidating what would otherwise require multiple separate expensive processes into a single low-cost operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs, minimizes wafer stress and defects, and enhances processing efficiency, enabling higher throughput and improved device integrity in 3D semiconductor structures.
Implementation Method 1
The first layers include a photoresist material or a developable anti-reflective coating, and include a thermal acid generator (TAG). The method includes executing a first bake of the substrate. The first bake causes the TAG to generate acid in the first layers, the acid modifying the first layers to be soluble in a developer.
Implementation Method 2
forming, on a substrate by spin-on deposition, a layer stack of alternating layers of first and second carbon-containing materials
Data Source
AI summary
In certain embodiments, a method includes forming, on a substrate by spin-on deposition, a layer stack of alternating layers of first and second carbon-containing materials. The layers of the first carbon-containing material include an agent-generating ingredient for generating a solubility-changing agent in response to an activation trigger. The method includes executing the activation trigger in response to which the solubility-changing agent is generated from the agent-generating ingredient in the layers of the first carbon-containing material and modifies the layers of the first carbon-containing material to be soluble in a developer. The method includes etching first openings through the layer stack, filling the first openings with a third material, etching second openings through the layer stack, removing the layers of the first carbon-containing material from the layer stack by exposing those to the developer, and replacing the layers of the first carbon-containing material with a fourth material.