3D Nonvolatile Memory Data Integrity via Adjacent Cell Updates

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Solution Overview

Problem

In three-dimensional nonvolatile semiconductor memory devices, there is a challenge in maintaining data integrity due to the risk of hole and electron recombination in charge storage films, leading to data changes over time, especially when adjacent memory cells retain a threshold voltage distribution that is not updated during write operations.

Innovation Solution

The implementation of an additional write operation to change the threshold voltage distribution of adjacent memory cells from a negative threshold voltage distribution to a positive one, ensuring that all memory cells, including those adjacent to the write target, are updated with specific threshold voltage distributions to prevent data changes, and a verification process is conducted to confirm these changes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are stacked three-dimensionally to increase integration, then device density is improved, but data integrity deteriorates due to hole and electron recombination in charge storage films

Engineering Contradiction:
Improvememory cell densityVSAvoiddata integrity
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies preliminary action by performing an additional write operation before the normal write operation to set the threshold voltage distribution of adjacent memory cells to a positive value. This preventive measure ensures that adjacent cells do not retain negative threshold voltage distributions that could cause hole-electron recombination and data changes, thereby maintaining data integrity in three-dimensional stacked structures.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If additional write operations are performed to update adjacent memory cells, then data integrity is improved, but operation complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidwrite operation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by targeting only the adjacent memory cells (specifically cells at positions n-1 and n+1 relative to the write target cell n) for the additional write operation, rather than uniformly applying operations to all cells. This localized approach updates only the cells that pose recombination risks, improving data integrity while minimizing the increase in operational complexity.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of data retention by preventing data changes due to recombination of holes and electrons, ensuring that all memory cells are updated appropriately, thereby improving the overall data integrity and stability in the memory device.

Implementation Method 1

applying a voltage to the memory cells to store holes in the charge storage film and thereby erase retained data of the memory cells

Methodology Applied
Scientific EffectHole storage in charge storage film:

Implementation Method 2

applying a voltage to the memory cells to store electrons in the charge storage film and thereby write plural types of data to the memory cells

Methodology Applied
Scientific EffectElectron storage in charge storage film:

Implementation Method 3

there is a challenge in maintaining data integrity due to the risk of hole and electron recombination in charge storage films, leading to data changes over time

Methodology Applied
Scientific EffectHole-electron recombination prevention:

Data Source

PatentUS8885417B2Nonvolatile semiconductor memory device
Publication Date: 2014.11.11 KIOXIA CORP
  • US8885417B2 patent drawing
  • US8885417B2 patent drawing
  • US8885417B2 patent drawing

AI summary

In writing, a first write operation to a first memory cell is executed; and a second write operation for providing a first threshold-voltage distribution to a second memory cell adjacent to the first one, is executed. The first threshold voltage distribution is a lowest threshold-voltage distribution among the positive threshold voltage distributions. It is verified whether a desired threshold voltage distribution has been obtained in the first memory cell or not (first write verify operation), moreover, it is verified whether a first threshold voltage distribution or a threshold voltage distribution having a voltage level larger than the first threshold-voltage distribution has been obtained in the second memory cell or not (second write verify operation). A control circuit outputs results of the first write verify operation and the second write verify operation.