3D Memory Structure Air Gaps for Lower Word Line Capacitance
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Solution Overview
Problem
The challenge in semiconductor memory structures is to reduce capacitance between adjacent word lines in 3D architectures to enhance operation speed without increasing area significantly.
Innovation Solution
A 3D semiconductor memory structure is developed with air gaps and specific manufacturing methods, including the formation of elongated slots and pillars, followed by the deposition of dielectric and conductive materials to create a three-dimensional memory array with reduced capacitance between word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a 3D semiconductor memory structure is used to increase memory capacity, then the memory capacity is effectively increased with a relatively small area penalty, but the capacitance between two adjacent word lines increases which reduces operation speed
Solution Approach 1:
The patent extracts the harmful dielectric material between adjacent word lines and replaces it with air gaps. By removing the solid dielectric material that causes parasitic capacitance and introducing air (which has much lower permittivity), the capacitance between adjacent word lines is significantly reduced, thereby improving operation speed while maintaining the 3D memory architecture
Solution Approach 2:
The patent introduces air gaps (porous structure) between adjacent word lines instead of using solid dielectric material. These air gaps act as low-permittivity regions that reduce the electric field coupling between adjacent conductors, thereby reducing parasitic capacitance and improving signal speed without compromising the memory capacity benefits of the 3D structure
2Speed
If the capacitance between word lines is reduced to improve operation speed, then the operation speed is enhanced, but additional manufacturing steps are required which increases device complexity
Solution Approach 1:
The patent performs preliminary action by forming air gaps between word lines during the early stages of the manufacturing process, specifically during the formation of the memory hole structure and word line deposition. By establishing the air gap structure early, subsequent processing steps can proceed without additional complexity, as the air gaps are maintained through the remaining fabrication steps
Solution Approach 2:
The patent uses air as an intermediary material between adjacent word lines. This air gap acts as a mediator that reduces electromagnetic coupling and parasitic capacitance between conductors. The air gap is formed as an intermediate structure during manufacturing by controlling the deposition and etching processes to leave void spaces between closely spaced word lines
Data Source
AI summary
A semiconductor device includes a substrate and a memory structure disposed over the substrate. The memory structure includes a pair of first conductive lines, a channel element disposed between the pair of the first conductive lines and formed with an air gap therein, a first memory element disposed to separate one of the pair of the first conductive lines from the channel element, and a second memory element disposed to separate the other one of the pair of the first conductive lines from the channel element. A method for manufacturing the semiconductor device is also disclosed.