3D Memory Array Architecture with Vertical Conductive Extensions
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Solution Overview
Problem
Current memory device fabrication techniques face challenges in reducing device size, increasing storage density, and lowering costs, particularly in transitioning from two-dimensional to three-dimensional memory array architectures.
Innovation Solution
The implementation of a three-dimensional memory array architecture with a vertical integration of phase change material (PCM) memory cells, utilizing a stack of conductive lines separated by insulation material and conductive extensions, which reduces the complexity and cost of fabrication by minimizing the number of masks required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If memory cells are arranged in a two-dimensional array, then fabrication is simpler, but storage density is limited
Solution Approach 1:
The patent transitions from a two-dimensional memory cell arrangement to a three-dimensional structure by forming vertical conductive extensions that extend between insulating layers. Multiple memory cells are stacked vertically at the same planar location, increasing storage density without proportionally increasing the fabrication complexity, as the vertical stacking is achieved through sequential deposition processes rather than complex lateral patterning
2Quantity of substance
If memory cells are arranged in a three-dimensional array, then storage density increases, but fabrication complexity increases
Solution Approach 1:
The three-dimensional memory structure is divided into discrete horizontal layers separated by insulating material, with conductive extensions formed in each layer. This segmentation allows the complex 3D structure to be built through sequential, manageable fabrication steps, where each layer can be processed independently before moving to the next layer, thereby reducing overall fabrication complexity
Solution Approach 2:
Conductive extensions are formed within insulating layers, with storage element material deposited around the conductive extensions. The conductive extensions are nested within the insulating matrix, and memory cells are nested vertically, creating a compact structure where components are embedded within each other rather than arranged side-by-side, reducing the overall device footprint and fabrication complexity
3Manufacturing precision
If more masks are used in fabrication, then manufacturing precision improves, but manufacturing cost increases
Solution Approach 1:
The conductive extensions serve multiple functions: they act as bit lines for memory cells at one level, and as word lines for memory cells at adjacent levels. This multi-functionality reduces the total number of separate conductive structures needed, thereby reducing the number of masking and patterning steps required, which in turn reduces both manufacturing cost and process complexity while maintaining precise pattern formation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a denser memory array with reduced fabrication complexity and cost, achieving higher storage density while maintaining reliability and data retention without power.
Implementation Method 1
a storage element material, such as a phase change material (PCM)
Data Source
Figure 1~2
Figure 3~4
Figure 5A
AI summary
As disclosed there is provided a memory array, comprising: a stack comprising a plurality of first conductive lines at a plurality of levels, wherein the plurality of first conductive lines are separated from one another by an insulation material (1048) and a storage element material; and a conductive extension (1056) formed in a via formed through the stack at each of the plurality of levels, the storage element material corresponding to the level extends to a sidewall of the via, and a conductive material of the conductive line corresponding to the level is recessed with respect to the sidewall of the via such that the storage element material forms a protrusion with respect to the conductive line corresponding to the level.