3D Memory Backside Source Contact Layout for Lower Parasitic Capacitance

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Solution Overview

Problem

Existing 3D memory devices face challenges with front side source contacts, which introduce leakage current and parasitic capacitance, and complicate the fabrication process, leading to reduced production yield and increased costs.

Innovation Solution

The implementation of a 3D memory device with a backside source contact configuration, where the source contacts are moved from the front side to the backside, eliminating the need for spacers and reducing local stress, thereby improving device performance and reducing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If front side source contacts are used in 3D memory devices, then the fabrication process is simplified, but leakage current and parasitic capacitance increase, reducing device performance

Engineering Contradiction:

Improvefabrication process simplicityVSAvoidelectrical performance

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The source contacts are inverted from the conventional front side position to the back side position. This inversion eliminates the harmful interactions between source contacts and memory strings, removing leakage current and parasitic capacitance while maintaining fabrication simplicity through a modified but straightforward process

Inventive Principle:

Principle #13The other way round (Inversion)

2Strength

If front side source contacts are used, then device structure is established, but local stress increases and production yield decreases

Engineering Contradiction:

Improvestructural integrityVSAvoidproduction yield

Core Design Contradiction:

StrengthVSProductivity

Solution Approach 1:

By inverting the source contact position to the back side, the local stress concentration at the front side is eliminated. This structural inversion prevents fabrication defects and improves production yield while maintaining the necessary structural integrity through proper back side contact formation

Inventive Principle:

Principle #13The other way round (Inversion)

3Reliability

If front side source contacts are used, then electrical connections are established, but parasitic capacitance increases, reducing device performance

Engineering Contradiction:

Improveelectrical connectionVSAvoidparasitic capacitance

Core Design Contradiction:

ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The source contacts are extracted from the front side position where they create harmful parasitic capacitance with memory strings. By relocating them to the back side, the harmful capacitive coupling is eliminated while electrical connections are maintained through the substrate

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

Inverting the source contact position eliminates the geometric configuration that creates parasitic capacitance. The back side positioning ensures no overlapping or close proximity between source contacts and memory string conductors, removing the harmful capacitive effect

Inventive Principle:

Principle #13The other way round (Inversion)

4Ease of manufacture

If front side source contacts are used, then memory device is assembled, but fabrication complexity increases, reducing production yield

Engineering Contradiction:

Improveassembly processVSAvoidfabrication process complexity

Core Design Contradiction:

Ease of manufactureVSDevice complexity

Solution Approach 1:

Inverting the source contact formation to the back side simplifies the fabrication process by eliminating the need for complex spacer formation and alignment steps required for front side contacts. The back side contact process is more straightforward and integrates better with existing fabrication flows

Inventive Principle:

Principle #13The other way round (Inversion)

Data Source

PatentUS20250029972A1Three-dimensional memory device with backside source contact

Publication Date: 2025.01.23 YANGTZE MEMORY TECH CO LTD

AI summary

In an example, a three-dimensional (3D) memory device includes a stack structure including interleaved conductive layers and dielectric layers, a first semiconductor layer above the stack structure, a second semiconductor layer above the first semiconductor layer, channel structures extending vertically through the stack structure and the first semiconductor layer, and a source contact in contact with the second semiconductor layer.