3D Hybrid-Bonded Memory Banks for SRAM Density Scaling
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Solution Overview
Problem
The scaling of monolithic static random-access memory (SRAM) has not kept pace with other standard cell logic components, leading to inefficiencies in density, integration, and performance, particularly due to vulnerabilities in SRAM cells that other logic components do not have.
Innovation Solution
Implementing three-dimensional (3D) memory architectures with hybrid bonding, utilizing ultra-high density hybrid bond interface (HBI) stacking of die/chiplets at the memory bank level, and incorporating dedicated vias for power delivery, enabling fine pitch connections at the bit-line and word-line levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If monolithic SRAM scaling is pursued, then memory density should improve, but SRAM scaling has not kept pace with logic components due to cell vulnerabilities
Solution Approach 1:
The patent divides the monolithic SRAM into separate memory die and logic die, with the memory bank split across two dies. This segmentation allows independent optimization of SRAM cells on one die while placing logic components on another, resolving the scaling mismatch between memory and logic components.
Solution Approach 2:
The patent transitions from a planar monolithic architecture to a three-dimensional stacked architecture using hybrid bonding. Memory banks are distributed across multiple stacked dies, utilizing the vertical dimension to achieve higher density while maintaining reliable SRAM cell operation on individual dies.
2Adaptability or versatility
If through silicon vias (TSVs) are used for stacking, then integration is achieved, but overhead and area are increased
Solution Approach 1:
The patent extracts the connection function from traditional TSVs and implements it through hybrid bonding interfaces between stacked dies. This eliminates the need for deep TSVs that consume significant area and add complexity, while maintaining integration capability through alternative bonding mechanisms.
Solution Approach 2:
The patent introduces hybrid bonding as an intermediary technology that enables die stacking without requiring TSVs. The hybrid bonding interface serves as a mediator that provides electrical and mechanical connection between stacked dies with reduced overhead compared to TSV-based approaches.
3Quantity of substance
If fine pitch connections are implemented, then memory density improves, but manufacturing complexity increases
Solution Approach 1:
The patent performs preliminary routing and connection establishment at the hybrid bonding interface before final die stacking. This allows fine pitch connections to be planned and prepared in advance, reducing the manufacturing complexity of achieving precise alignments during the stacking process.
Data Source
AI summary
Three-dimensional (3D) memory architectures with hybrid bonding and methods for making same. Methods and apparatus employ ultra-high density (defined herein as sub 1 micron pitch) hybrid bond interface (HBI) stacking die/chiplets at the memory bank level. Various configurations for distributing the memory bank and the peripheral logic between a bottom die and a top die are described, with application to further die stacking. Provided apparatus may also implement dedicated vias for power delivery from a principle bottom die to the top die.