3D Memory Cell Structure With Vertical Body Contact Routing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor technologies face challenges in achieving high integration and high operating speed in memory devices, particularly in three-dimensional memory devices with stacked memory cells.
Innovation Solution
A semiconductor device design featuring a lower structure, horizontal and vertical conductive lines, recessed sides in horizontal layers, and a body contact portion, along with a method of fabricating these components to create a 3D memory device with alternating stacks and vertical openings, allowing for efficient integration and operation of memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are stacked in three dimensions to increase capacity, then integration density is improved, but manufacturing complexity increases
Solution Approach 1:
The memory device is divided into distinct functional layers: lower structure, horizontal conductive line layer, data storage element layer, vertical conductive line layer, horizontal layer with recessed side, and body contact portion. Each layer performs a specific function and can be independently fabricated and optimized, reducing overall manufacturing complexity while maintaining high integration density.
Solution Approach 2:
The patent transitions from planar two-dimensional memory cell arrangement to three-dimensional stacked architecture by introducing vertical conductive lines and body contact portions that penetrate through horizontal layers. This dimensional transition enables increased memory capacity without proportionally increasing footprint area or manufacturing complexity.
2Quantity of substance
If three-dimensional stacked memory cells are implemented, then integration density is improved, but operating speed may deteriorate
Solution Approach 1:
Body contact portions are formed to vertically penetrate the horizontal layers and establish electrical connections to the body of transistors in advance. This preliminary connection establishment reduces signal propagation delays and ensures optimal electrical pathways are in place before memory operations commence, thereby maintaining high operating speed in the three-dimensional structure.
Solution Approach 2:
Horizontal layers with recessed sides act as intermediaries between vertical conductive lines and body contact portions. These intermediate structures facilitate efficient electrical signal transmission through the stacked architecture while maintaining proper spacing and electrical isolation where needed, thus preserving operating speed.
Data Source
AI summary
A semiconductor device includes: a lower structure; a horizontal conductive line which is oriented horizontally over the lower structure; a data storage element which is disposed over the lower structure to be spaced from the horizontal conductive line; a vertical conductive line which is vertically oriented between the horizontal conductive line and the data storage element; a horizontal layer which is oriented horizontally between the horizontal conductive line and the data storage element, and including a recessed side which is disposed adjacent to the vertical conductive line; and a body contact portion oriented which is vertically oriented by penetrating the horizontal layer.