3D Memory Bonded Structure Isolating Support Circuitry

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Solution Overview

Problem

Three-dimensional memory devices face challenges in maintaining the performance of support circuitry due to degradation from collateral thermal cycling and hydrogen diffusion during the manufacturing of three-dimensional memory devices, which affects the reliability and efficiency of the memory arrays.

Innovation Solution

A bonded structure is formed by incorporating high-performance support circuitry on a different substrate than the three-dimensional memory array, followed by bonding the substrates together, allowing for independent optimization of both components and reducing the impact of manufacturing-related degradations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If support circuitry is integrated on the same substrate as the three-dimensional memory array, then device complexity is reduced and manufacturing is simplified, but the support circuitry performance degrades due to thermal cycling and hydrogen diffusion during memory device manufacturing

Engineering Contradiction:
Improvestructure integrationVSAvoidsupport circuitry performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The device is divided into two separate substrates: a first substrate containing the three-dimensional memory array and a second substrate containing the support circuitry. This segmentation allows each substrate to be optimized independently and prevents the support circuitry from being exposed to degradation conditions during memory array manufacturing processes such as thermal cycling and hydrogen diffusion.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A bonding structure is introduced as an intermediary component to connect the first substrate (memory array) and the second substrate (support circuitry). This bonding structure enables electrical and mechanical connection between the separated substrates while isolating the support circuitry from the harmful manufacturing processes applied to the memory array.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If support circuitry is separated onto a different substrate, then thermal cycling and hydrogen diffusion degradation is reduced, but device complexity and manufacturing complexity increase

Engineering Contradiction:
Improvesupport circuitry performanceVSAvoidsubstrate integration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The device is divided into two separate substrates: a first substrate containing the three-dimensional memory array and a second substrate containing the support circuitry. This segmentation allows each substrate to be optimized independently and prevents the support circuitry from being exposed to degradation conditions during memory array manufacturing processes such as thermal cycling and hydrogen diffusion.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A bonding structure is introduced as an intermediary component to connect the first substrate (memory array) and the second substrate (support circuitry). This bonding structure enables electrical and mechanical connection between the separated substrates while isolating the support circuitry from the harmful manufacturing processes applied to the memory array.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If support circuitry is separated onto a different substrate, then degradation from thermal cycling and hydrogen diffusion is reduced, but manufacturing processes become more complex

Engineering Contradiction:
Improvesupport circuitry performanceVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The support circuitry is fabricated on the second substrate in advance, before the memory array manufacturing processes that cause thermal cycling and hydrogen diffusion. This preliminary fabrication allows the support circuitry to be completed and protected from degradation before being integrated with the memory array through the bonding structure.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The device is divided into two separate substrates: a first substrate containing the three-dimensional memory array and a second substrate containing the support circuitry. This segmentation allows each substrate to be optimized independently and prevents the support circuitry from being exposed to degradation conditions during memory array manufacturing processes such as thermal cycling and hydrogen diffusion.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the performance and reliability of the support circuitry, improving the overall efficiency and longevity of the three-dimensional memory devices by isolating the memory array from degradation issues.

Implementation Method 1

the second die-to-die bonding pads are bonded to the first die-to-die bonding pads to provide die-to-die bonding between the first semiconductor die and the second semiconductor die

Methodology Applied
Scientific EffectDie-to-die bonding: Welding

Data Source

PatentUS10985169B2Three-dimensional device with bonded structures including a support die and methods of making the same
Publication Date: 2021.04.20 SANDISK TECHNOLOGIES LLC
  • US10985169B2 patent drawing
  • US10985169B2 patent drawing
  • US10985169B2 patent drawing

AI summary

A memory die including a three-dimensional array of memory elements and a logic die including a peripheral circuitry that support operation of the three-dimensional array of memory elements can be bonded by die-to-die bonding to provide a bonded assembly. External bonding pads for the bonded assembly can be provided by forming recess regions through the memory die or through the logic die to physically expose metal interconnect structures within interconnect-level dielectric layers. The external bonding pads can include, or can be formed upon, a physically exposed subset of the metal interconnect structures. Alternatively or additionally, laterally-insulated external connection via structures can be formed through the bonded assembly to multiple levels of the metal interconnect structures. Further, through-dielectric external connection via structures extending through a stepped dielectric material portion of the memory die can be physically exposed, and external bonding pads can be formed thereupon.