3D Memory Bridge Structure With Redundant Current Paths
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Solution Overview
Problem
The challenge in developing three-dimensional (3D) memory devices is the reliability issue due to voids and missing filling of conductive layers in deep trenches, leading to short circuits and reduced reliability, especially in highly stacked memory devices, where the thick photoresist layers used in photolithography can collapse, affecting the formation of conductive layers and photoresist layers.
Innovation Solution
The solution involves expanding the width of conductive bridge structures across the staircase region to create at least two current paths between core regions, allowing for electrical connection even if one path is blocked, and broadening the processing window for forming thick photoresist layers and filling deep trenches, thereby increasing the reliability of the memory device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the width of conductive bridge structures is increased to create multiple current paths, then reliability is improved, but device area is increased
Solution Approach 1:
The patent transitions from planar memory cells to three-dimensional stacked memory architecture, moving the solution into the vertical dimension. Multiple memory stacks are arranged vertically above the substrate, with bridge structures connecting corresponding conductive layers across different stacks. This vertical arrangement allows multiple current paths to be formed within a smaller lateral footprint, resolving the contradiction between reliability improvement and device area increase.
2Manufacturing precision
If thick photoresist layers are used in photolithography for highly stacked memory devices, then manufacturing capability is improved, but photoresist layer stability deteriorates
Solution Approach 1:
The patent divides the formation process into multiple photolithography steps, each creating patterns at different heights or locations. Instead of using a single extremely thick photoresist layer that would be unstable, the process segments the patterning into several steps with thinner photoresist layers applied sequentially. This segmentation maintains photoresist stability while achieving the manufacturing capability needed for highly stacked memory devices.
Data Source
AI summary
In certain aspects, a three-dimensional (3D) memory device includes a stack structure including alternating conductive layers and dielectric layers and having at least two core regions and a staircase region between the two core regions, and bridge structures connecting the two core regions and extending through the staircase region in a first direction. A first bridge structure of the bridge structures includes at least two current paths between the two core regions.