3D Memory Device Fabrication via Stress-Mediating Buffer Layer

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Solution Overview

Problem

The challenge lies in manufacturing miniaturized memory devices with 3-dimensional structures while preventing substrate deformation due to stress differences between thin films during deposition.

Innovation Solution

The method involves alternately stacking dielectric and sacrificial layers on a substrate, forming holes and openings, and using specific gases to deposit silicon oxide and silicon nitride layers, with an etchant to remove the sacrificial layers, and employing an edge ring to press the substrate edge and maintain uniform temperature and pressure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If thin films are deposited alternately on substrate, then 3-dimensional memory device structure is formed, but substrate deformation occurs due to stress difference between thin films

Engineering Contradiction:
Improve3-dimensional memory device structure formationVSAvoidsubstrate deformation
Core Design Contradiction:
Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

A buffer layer is introduced as an intermediary between the thin films and the substrate. This buffer layer has intermediate stress characteristics that compensate for the stress differences between alternating thin films, preventing substrate deformation while allowing the 3D structure to be formed. The buffer layer acts as a stress mediator that absorbs and balances the cumulative stress from multiple deposited layers.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The stress characteristics of the buffer layer are specifically controlled by adjusting its material composition and thickness parameters. By changing these parameters, the buffer layer's stress can be tuned to match and counterbalance the stress from the alternating thin films, thereby preventing substrate warpage during the deposition process.

Inventive Principle:
Principle #35Parameter changes

2Volume of moving object

If miniaturization is pursued, then memory device size is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvememory device sizeVSAvoidmanufacturing complexity
Core Design Contradiction:
Volume of moving objectVSDevice complexity

Solution Approach 1:

The patent transitions from 2D planar memory structures to 3D vertical structures by stacking multiple thin film layers alternately. This dimensional change allows increased storage capacity within a smaller footprint, achieving miniaturization while the buffer layer simplifies the manufacturing process by preventing substrate deformation that would complicate fabrication.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The memory device is segmented into multiple alternating thin film layers (magnetic layers, non-magnetic layers) stacked vertically. This segmentation into functional layers enables 3D integration and miniaturization, while the buffer layer provides a stable foundation that simplifies the overall manufacturing process despite the increased structural complexity.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of a 3-dimensional memory device structure that reduces volume and prevents substrate deformation, ensuring efficient deposition and maintaining process uniformity.

Implementation Method 1

supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, and Si4H10, to deposit a silicon oxide layer

Methodology Applied
Scientific EffectChemical Vapor Deposition: Chemical Vapour Deposition

Implementation Method 2

supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and dichloro silane (SiCl2H2), and ammonia-based gas, to deposit a silicon nitride layer

Methodology Applied
Scientific EffectChemical Vapor Deposition: Chemical Vapour Deposition

Data Source

PatentUS9396954B2Method and apparatus for manufacturing three-dimensional-structure memory device
Publication Date: 2016.07.19 EUGENE TECH CO LTD
  • US9396954B2 patent drawing
  • US9396954B2 patent drawing
  • US9396954B2 patent drawing

AI summary

Provided is a method of manufacturing a memory device having a 3-dimensional structure, which includes alternately stacking one or more dielectric layers and one or more sacrificial layers on a substrate, forming a through hole passing through the dielectric layers and the sacrificial layers, forming a pattern filling the through hole, forming an opening passing through the dielectric layers and the sacrificial layers, and supplying an etchant through the opening to remove the sacrificial layers. The stacking of the dielectric layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, and Si4H10, to deposit a silicon oxide layer. The stacking of the sacrificial layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and dichloro silane (SiCl2H2), and ammonia-based gas, to deposit a silicon nitride layer.