3D Memory Etching Sequence for Wet-Etch Byproduct Removal
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Solution Overview
Problem
The existing methods for manufacturing semiconductor memory devices face challenges in improving operational reliability due to defects caused by byproducts produced during the wet etching process of sacrificial layers, which affect the integration density and performance of three-dimensional memory devices.
Innovation Solution
A method involving the alternately stacking of sacrificial layers and interlayer insulating layers, followed by the formation of slits and selective removal of sacrificial layers through wet etching, and subsequent removal of byproducts at the ends of interlayer insulating layers using a dry etching process, specifically utilizing a process with HF2− ions to enhance etch selectivity and mitigate defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wet etching process is used to remove sacrificial layers, then sacrificial layers can be effectively removed, but byproducts are produced at ends of interlayer insulating layers causing defects
Solution Approach 1:
The patent segments the etching process into two distinct stages: wet etching to remove sacrificial layers, and subsequent dry etching to remove byproducts. This segmentation allows each process to be optimized independently - wet etching for effective sacrificial layer removal and dry etching for clean byproduct elimination without damaging interlayer insulating layers
Solution Approach 2:
The patent extracts and removes the harmful byproducts that are generated during the wet etching process. By introducing a separate dry etching step specifically targeted at removing byproducts from the ends of interlayer insulating layers, the harmful substances are extracted from the system before they can cause defects
2Productivity
If integration density is increased in three-dimensional memory devices, then device performance improves, but manufacturing precision requirements become more stringent
Solution Approach 1:
The patent changes the parameters of the etching process by transitioning from wet etching to dry etching with HF2− ions. This parameter change enables precise control over the etching depth and selectivity, allowing removal of byproducts from the ends of interlayer insulating layers without affecting the layers themselves, thereby meeting the stringent precision requirements for high integration density devices
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively removes byproducts and enhances operational reliability by improving the etch selectivity and reducing defects in semiconductor memory devices, thereby increasing the integration density and performance of three-dimensional memory devices.
Implementation Method 1
removing the sacrificial layer through the slit through a wet etching process
Implementation Method 2
removing, through a dry etching process, a byproduct that is produced at ends of the interlayer insulating layers during the wet etching process
Implementation Method 3
specifically utilizing a process with HF2− ions to enhance etch selectivity
Data Source
AI summary
A method of manufacturing a semiconductor memory device includes alternately stacking sacrificial layers and interlayer insulating layers over a lower structure, forming a slit passing through the sacrificial layers and the interlayer insulating layers, removing the sacrificial layers through the slit through a wet etching process, and removing, through a dry etching process, a byproduct that is produced at ends of the interlayer insulating layers during the wet etching process.