3D Memory Read Disturbance via Channel Floating

Solution Overview

Problem

Semiconductor memory devices face challenges in maintaining data integrity and reliability during read operations due to potential disturbances in unselected cell strings, which can lead to inaccurate data retrieval and reduced device performance.

Innovation Solution

The semiconductor memory device employs a method where channel regions of unselected cell strings are biased to an initial voltage, floated, and then boosted to a second pass voltage, electrically separating them from bit lines and source lines to prevent disturbances during read operations, ensuring stable data retrieval from selected cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If channel regions of unselected cell strings are left at initial voltage during read operation, then device complexity is reduced, but data integrity deteriorates due to disturbances in unselected cell strings

Engineering Contradiction:

Improvedata integrityVSAvoidvoltage control complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by floating the channel regions of unselected cell strings before the read operation begins. This preparatory step isolates the unselected cell strings from voltage disturbances that would occur during the read operation, preventing data integrity issues before they can manifest. The floating state is established in advance through control signals that disconnect the channel regions from the bit lines and source line.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent employs parameter changes by dynamically adjusting the voltage state of unselected cell string channel regions during operation. The channel regions transition from an initial voltage state to a floated state (isolated electrical state), and then to a boosted voltage state during the read operation. These parameter changes are controlled through specific voltage signals applied to the word lines and selection transistors, allowing the system to maintain data integrity without permanently increasing device complexity.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If channel regions of unselected cell strings are floated during read operation, then data integrity is improved, but use of energy increases due to additional voltage control operations

Engineering Contradiction:

Improvedata integrityVSAvoidenergy consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies partial action by selectively floating only the channel regions of unselected cell strings during the read operation, rather than affecting the entire memory array. This targeted approach isolates only the necessary portions (unselected cell strings) from voltage disturbances, while leaving the selected cell strings operational. The energy consumption is thus limited to controlling specific regions rather than the entire device, reducing overall energy usage compared to a blanket approach.

Inventive Principle:

Principle #16Partial or excessive action

3Reliability

If channel regions of unselected cell strings are boosted to second pass voltage, then disturbance prevention is improved, but device complexity increases due to additional voltage levels

Engineering Contradiction:

Improvedisturbance preventionVSAvoidvoltage level management

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs parameter changes by dynamically adjusting the voltage state of unselected cell string channel regions during operation. The channel regions transition from an initial voltage state to a floated state (isolated electrical state), and then to a boosted voltage state during the read operation. These parameter changes are controlled through specific voltage signals applied to the word lines and selection transistors, allowing the system to maintain data integrity without permanently increasing device complexity.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS9520198B2Semiconductor memory device including three-dimensional memory cell array structure and operating method thereof

Publication Date: 2016.12.13 SK HYNIX INC

AI summary

An operating method includes biasing channel regions of unselected cell strings among the cell strings to an initial voltage while applying a first pass voltage to the plurality of word lines; floating the channel regions of the unselected cell strings; increasing the first pass voltage to a second pass voltage during the floating of the channel regions; and reading data from selected memory cells of selected cell strings among the cell strings.