3D Memory Channel Hole Formation With Nonconformal Sacrificial Layer
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Solution Overview
Problem
In 3D memory devices, the challenge lies in forming channel holes with a less-tilted profile and controlling critical dimensions, especially for high aspect ratios, due to isotropic etching processes that enlarge dimensions and leave native oxide and debris, affecting subsequent fabrication steps.
Innovation Solution
A method involving a nonconformal sacrificial layer is used, where the layer's thickness decreases from top to bottom along the sidewall, allowing for aggressive etching with controlled selectivity to remove the layer and part of the dielectric stack, resulting in a more vertical sidewall profile and effective cleaning of native oxide and residuals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If isotropic etching process is used to form channel holes, then etching can proceed uniformly in all directions, but the channel hole diameter varies and tilted sidewall profile is formed
Solution Approach 1:
A nonconformal sacrificial layer is deposited on the sidewalls of the opening before the etching process. This layer has a thickness that decreases from top to bottom, which compensates for the tilting effect during etching and enables formation of vertical sidewalls with controlled diameter
Solution Approach 2:
The sacrificial layer is applied nonconformally with varying thickness across different locations on the sidewall (thicker at top, thinner at bottom). This local variation in layer thickness allows differential protection during etching, resulting in uniform channel hole diameter and vertical sidewalls
2Productivity
If aggressive etching is applied to remove sacrificial layer and dielectric stack, then cleaning effectiveness improves, but native oxide and debris remain affecting subsequent steps
Solution Approach 1:
The nonconformal sacrificial layer serves as an intermediary that is selectively removed with the dielectric stack through controlled etching. This process effectively cleans native oxide and debris from the opening while the varying layer thickness ensures complete removal without damaging underlying structures
Solution Approach 2:
The etching process uses controlled selectivity parameters to differentiate between materials. By adjusting etching conditions, the process selectively removes the sacrificial layer and dielectric stack while leaving the channel structure intact, achieving effective cleaning with high reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the variation in channel hole diameter, improving critical dimension control, enabling more aggressive cleaning and better conditions for semiconductor plug growth, thus enhancing process reliability and yield.
Implementation Method 1
A nonconformal sacrificial layer is deposited along a sidewall of the opening
Implementation Method 2
A first etchant having a selectivity between silicon oxide and silicon nitride between about 0.9 and about 1.1 is applied through the opening to form the channel hole
Data Source
Figure 1
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Figure 3A
AI summary
Methods for forming channel holes in 3D memory devices using a nonconformal sacrificial layer are disclosed. In an example, a dielectric stack including interleaved first dielectric layers and second dielectric layers is formed on a substrate. An opening extending vertically through the dielectric stack is formed. A nonconformal sacrificial layer is formed along a sidewall of the opening, such that a variation of a diameter of the opening decreases. The nonconformal sacrificial layer and part of the dielectric stack abutting the nonconformal sacrificial layer are removed. A channel structure is formed in the opening after removing the nonconformal sacrificial layer and part of the dielectric stack.