3D Memory Channel Structure With Silicide-Stabilized Reliability
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Solution Overview
Problem
Existing semiconductor devices face challenges in increasing data storage capacity and maintaining reliability and electrical characteristics, particularly in three-dimensional memory cell configurations.
Innovation Solution
A semiconductor device design featuring gate electrodes stacked perpendicular to the substrate, with a channel structure including a channel layer having varying diameters and a metal silicide region, enhancing electrical characteristics and reliability through a channel layer crystallized by metal-induced lateral crystallization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are arranged three-dimensionally to increase data storage capacity, then storage capacity is improved, but reliability and electrical characteristics deteriorate
Solution Approach 1:
The channel layer is designed with varying diameters along its length, creating different local structures: a first region with a larger diameter for stable metal silicide contact, a second region with a reduced diameter for controlled electrical characteristics, and a third region with a larger diameter for gate electrode contact. This local variation in geometry allows different sections to fulfill different functional requirements, improving overall device reliability while maintaining 3D configuration.
Solution Approach 2:
The channel layer's diameter parameter is changed along its length to optimize performance. The diameter varies from a first diameter in the first region, to a reduced second diameter in the second region, to a third diameter in the third region. This parameter change enables better control over electrical characteristics and metal silicide stability without sacrificing the high storage capacity provided by the 3D structure.
2Quantity of substance
If memory cells are arranged three-dimensionally to increase data storage capacity, then storage capacity is improved, but electrical characteristics deteriorate
Solution Approach 1:
The channel layer is designed with varying diameters along its length, creating different local structures: a first region with a larger diameter for stable metal silicide contact, a second region with a reduced diameter for controlled electrical characteristics, and a third region with a larger diameter for gate electrode contact. This local variation in geometry allows different sections to fulfill different functional requirements, improving overall device reliability while maintaining 3D configuration.
Solution Approach 2:
The channel layer's diameter parameter is changed along its length to optimize performance. The diameter varies from a first diameter in the first region, to a reduced second diameter in the second region, to a third diameter in the third region. This parameter change enables better control over electrical characteristics and metal silicide stability without sacrificing the high storage capacity provided by the 3D structure.
3Ease of manufacture
If a uniform channel layer structure is used, then manufacturing is simplified, but metal silicide movement occurs reducing reliability
Solution Approach 1:
The channel layer is designed with varying diameters along its length, creating different local structures: a first region with a larger diameter for stable metal silicide contact, a second region with a reduced diameter for controlled electrical characteristics, and a third region with a larger diameter for gate electrode contact. This local variation in geometry allows different sections to fulfill different functional requirements, improving overall device reliability while maintaining 3D configuration.
Solution Approach 2:
The channel layer is formed with a pre-designed non-uniform diameter profile before metal silicide deposition. This preliminary structural preparation ensures that when metal silicide is later deposited and subjected to thermal processing, it remains stable and does not move, because the tapered geometry provides mechanical constraints and gradient adhesion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design improves electrical characteristics and reliability by stabilizing the channel layer structure, preventing metal silicide movement, and ensuring consistent performance in three-dimensional memory cell configurations.
Implementation Method 1
channel layer crystallized by metal-induced lateral crystallization
Data Source
AI summary
A semiconductor device includes a substrate; gate electrodes spaced apart from each other and stacked in a direction, perpendicular to an upper surface of the substrate; first and second horizontal conductive layers sequentially stacked between the substrate and the gate electrodes; and a channel structure passing through the gate electrodes and extending perpendicularly, and including a channel layer contacting the first horizontal conductive layer, wherein the channel layer has a region having a reduced diameter below a first level in which a lower surface of a lowermost gate electrode is located, among the gate electrodes, and the channel structure further includes a metal silicide region located below the first level and in the channel structure to contact the channel layer.