3D Memory Channel Contact via Segmented Polycrystalline Structure
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in achieving enhanced contact between semiconductor channels and underlying epitaxial pedestal structures, which affects the performance and efficiency of memory openings.
Innovation Solution
A three-dimensional semiconductor device is developed with a polycrystalline semiconductor channel that includes a polycrystalline cylindrical portion contacting the inner sidewall of a memory film, a polycrystalline neck portion extending through the opening in the memory film, and a polycrystalline base portion contacting the annular bottom surface of the memory film, utilizing an epitaxial pedestal structure for improved contact and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional semiconductor channel structure is used, then the device structure is simpler, but the contact between the channel and epitaxial pedestal structure is insufficient
Solution Approach 1:
The semiconductor channel is segmented into three distinct portions: a polycrystalline cylindrical portion, a polycrystalline neck portion, and a polycrystalline base portion. Each portion serves a specific function in enhancing contact with the epitaxial pedestal structure while maintaining overall structural integrity. This segmentation allows optimized contact surfaces without requiring complete structural redesign.
Solution Approach 2:
The channel structure transitions from a conventional single-dimensional vertical channel to a multi-dimensional structure with radial and axial variations. The neck portion creates a dimensional transition zone that enhances contact area with the epitaxial pedestal structure by utilizing both vertical and radial dimensions simultaneously.
2Reliability
If the contact area between channel and epitaxial pedestal structure is increased, then current flow improves, but manufacturing precision requirements increase
Solution Approach 1:
The manufacturing process utilizes parameter changes during annealing treatment, where temperature and time parameters are optimized to facilitate the formation of the three-port ion channel structure. The annealing process enables material diffusion and phase transformation that naturally create the desired contact geometry without requiring ultra-precise mechanical positioning.
Solution Approach 2:
The annealing process enables the semiconductor material to self-organize into the three-port ion channel structure with enhanced contact areas. The thermal energy facilitates atomic diffusion and crystallization that automatically form the optimal contact geometry between the channel portions and epitaxial pedestal structure, reducing the need for external precision control.
3Reliability
If a polycrystalline channel structure with multiple portions is implemented, then contact enhancement is achieved, but the manufacturing process becomes more complex
Solution Approach 1:
The process begins with forming a uniform amorphous semiconductor material layer that covers the entire epitaxial pedestal structure before any patterning or selective processing. This preliminary uniform layer serves as a precursor that simplifies subsequent processing steps, as the three-port ion channel structure is developed from this uniform base through controlled annealing rather than through complex multi-step patterning.
Solution Approach 2:
The manufacturing process exploits phase transitions of semiconductor material during annealing, where the amorphous material transforms into polycrystalline structures with enhanced contact properties. This phase transition naturally creates the desired multi-port ion channel morphology without requiring complex lithographic patterning or selective deposition processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the contact between the semiconductor channel and the epitaxial pedestal structure, leading to improved current flow and performance of the memory device, thereby addressing the existing challenges in three-dimensional memory devices.
Implementation Method 1
forming a vertical semiconductor channel by annealing the amorphous semiconductor material portion and the amorphous semiconductor channel material layer
Implementation Method 2
inducing solid phase epitaxial growth in the amorphous semiconductor material portion and in a lower portion of the amorphous semiconductor channel material layer using the in-process epitaxial pedestal structure as a growth template
Data Source
AI summary
An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. A memory opening is formed through the alternating stack. An amorphous semiconductor material portion is formed at a bottom region of the memory opening. A memory film is formed in the memory opening. The memory film includes an opening at a bottom portion thereof, and a surface of the amorphous semiconductor material portion is physically exposed at a bottom of the opening in the memory film. An amorphous semiconductor channel material layer is formed on the exposed surface of the amorphous semiconductor material portion and over the memory film. A vertical semiconductor channel is formed by annealing the amorphous semiconductor material portion and the amorphous semiconductor channel material layer. The vertical semiconductor channel and contacts an entire top surface of an underlying semiconductor material portion.