3D Non-Volatile Memory Charge-Trap Layout for Better Retention
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Solution Overview
Problem
Existing non-volatile memory devices with three-dimensional memory cell arrays face challenges in improving the retention property of memory cells.
Innovation Solution
The non-volatile memory device incorporates a configuration with electrodes, interlayer insulating films, semiconductor layers, conductive layers, first and second insulating films, where the conductive layers are separated in the Z-direction, and their width is narrower than that of the second insulating film, enhancing charge storage and retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a three-dimensional memory cell array structure is adopted, then storage density is improved, but charge retention between adjacent cells deteriorates
Solution Approach 1:
The conductive layer is divided into multiple separated conductive layers in the Z-direction, creating isolated charge storage regions. This segmentation prevents charge transfer between adjacent memory cells while maintaining high storage density through the three-dimensional stacked structure.
Solution Approach 2:
The patent applies different properties to different parts of the structure: the conductive layers have narrower width than the second insulating film, creating localized charge confinement regions. This local quality differentiation ensures proper charge retention in specific areas while maintaining overall high density.
2Reliability
If conductive layers are made narrower to improve charge confinement, then charge retention is improved, but charge storage capacity deteriorates
Solution Approach 1:
The patent transitions from a two-dimensional charge storage approach to a three-dimensional structure with multiple conductive layers stacked in the Z-direction. This dimensional change allows narrower individual layers (better retention) to collectively provide sufficient total charge storage capacity across multiple layers.
Data Source
AI summary
According to one embodiment, a non-volatile memory device includes electrodes, an interlayer insulating film, at least one semiconductor layer, conductive layers, first and second insulating films. The electrodes are arranged in a first direction. The interlayer insulating film is provided between the electrodes. The semiconductor layer extends in the first direction in the electrodes and the interlayer insulating film. The conductive layers are provided between each of the electrodes and the semiconductor layer, and separated from each other in the first direction. The first insulating film is provided between the conductive layers and the semiconductor layer. The second insulating film is provided between each of the electrodes and the conductive layers, and extends between each of the electrodes and the interlayer insulating film adjacent to the each of the electrodes. A width of the conductive layers in the first direction is narrower than that of the second insulating film.