3D Memory Charge Storage Structure for Retention and Erase Speed
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in efficiently integrating engineered charge storage elements and manufacturing methods to enhance storage capacity and data retention in vertical NAND strings.
Innovation Solution
A semiconductor structure is developed with an alternating stack of insulating and electrically conductive layers, featuring a memory opening fill structure that includes a vertical semiconductor channel, a tunneling dielectric layer, a continuous charge storage material layer, and discrete charge storage elements, along with discrete blocking dielectric material portions, which are formed through a process involving sacrificial material layers, oxidation, and the deposition of metal-semiconductor alloys.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If discrete charge storage elements are integrated into three-dimensional memory structures, then storage capacity and reliability are enhanced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The charge storage function is segmented into discrete charge storage elements positioned at specific levels within the memory structure, rather than using a continuous charge storage layer. This segmentation allows for targeted charge storage at different vertical positions, improving reliability through distributed storage while maintaining manageable structural complexity through modular design
Solution Approach 2:
The discrete charge storage elements are nested within the alternating stack of insulating and conductive layers, with each element positioned at a specific level and contacting the semiconductor channel. This nesting approach integrates the charge storage elements seamlessly into the existing memory structure hierarchy, enhancing reliability without proportionally increasing overall device complexity
2Quantity of substance
If discrete charge storage elements are formed at multiple levels, then storage density increases, but manufacturing precision requirements increase
Solution Approach 1:
Sacrificial material layers are formed at predetermined levels within the alternating stack before the discrete charge storage elements are created. These sacrificial layers serve as templates that guide the formation of charge storage elements at precise vertical positions, enabling high storage capacity across multiple levels while controlling manufacturing precision through pre-established structural guides
Solution Approach 2:
Sacrificial material layers act as intermediary structures during manufacturing, facilitating the precise formation of discrete charge storage elements at multiple levels. These intermediaries are removed after serving their positioning function, having enabled accurate charge storage element placement without requiring direct high-precision formation processes
3Reliability
If blocking dielectric material portions are added to the memory structure, then charge storage reliability improves, but device complexity and manufacturing steps increase
Solution Approach 1:
The blocking dielectric material portions are merged with the formation process of discrete charge storage elements, where the same oxidation process that creates the charge storage elements from sacrificial material also forms the blocking dielectric portions. This combining of functions improves charge storage reliability by adding blocking structures while minimizing the increase in manufacturing complexity through process integration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances charge storage characteristics, improves data retention, and enables faster erase speeds, while providing an improved programming/erase window, effectively addressing the limitations of existing three-dimensional memory devices.
Implementation Method 1
converting outer surface portions of the vertical stack of discrete charge storage elements into a vertical stack of blocking dielectric material portions by performing an oxidation process
Data Source
AI summary
A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, and a memory opening fill structure located in the memory opening and containing a vertical semiconductor channel and a memory film. The memory film includes a tunneling dielectric layer, a continuous charge storage material layer vertically extending through a plurality of the electrically conductive layers, a vertical stack of discrete charge storage elements located at levels of the electrically conductive layers and contacting a respective surface segment of an outer sidewall of the continuous charge storage material layer, and a vertical stack of discrete blocking dielectric material portions containing silicon atoms and oxygen atoms and located at the levels of the electrically conductive layers and vertically spaced apart from each other.