3D Memory Supporting Structure for Stable Gate Stack Contacts
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Solution Overview
Problem
Current semiconductor devices face challenges in increasing data storage capacity and reliability while maintaining integration density, particularly in the design and fabrication of three-dimensional memory cell structures.
Innovation Solution
The semiconductor device incorporates gate stacks with electrodes and insulating layers alternately stacked, vertical structures with conductive pads, a supporting structure, bit lines, and contact plugs to enhance integration density and reliability, along with a method of fabrication involving sacrificial layers and insulating layers to form the necessary structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If three-dimensional memory cell structures are implemented to increase data storage capacity, then integration density is improved, but structural stability and reliability deteriorate due to potential collapse issues
Solution Approach 1:
The gate stack is segmented into multiple alternating layers of electrodes and cell insulating layers, creating a modular three-dimensional structure. This segmentation allows for better stress distribution and structural stability while maintaining high integration density for increased data storage capacity
Solution Approach 2:
A supporting structure is formed on the gate stacks before subsequent fabrication steps. This preliminary supporting structure prevents collapse of the three-dimensional memory cell structure during fabrication and operation, ensuring structural stability while maintaining the high-density configuration
2Quantity of substance
If gate stacks with alternating electrodes and insulating layers are stacked vertically to increase integration density, then data storage capacity is improved, but manufacturing complexity increases
Solution Approach 1:
The memory structure transitions from planar two-dimensional arrangement to vertical three-dimensional stacking of gate stacks. This dimensional change achieves higher integration density by utilizing the vertical dimension, and the alternating layer structure provides self-aligned fabrication advantages that manage complexity
3Reliability
If vertical structures with conductive pads are used to connect bit lines to memory cells, then electrical connectivity is improved, but structural robustness during fabrication deteriorates
Solution Approach 1:
The supporting structure is formed in advance on the gate stacks before the vertical structures with conductive pads are created. This preliminary support provides mechanical robustness during fabrication processes, preventing damage to the delicate vertical structures while ensuring their electrical connectivity function is achieved
Data Source
AI summary
A semiconductor device is disclosed. The semiconductor device may include gate stacks that are on a substrate, are spaced apart from each other in a first direction, and include electrodes and cell insulating layers alternately stacked, a separation structure between the gate stacks and extending in a second direction crossing the first direction, vertical structures penetrating the gate stacks and having conductive pads on upper portions thereof, a supporting structure on the gate stacks, bit lines on the supporting structure, and contact plugs penetrating the supporting structure and electrically connecting the bit lines to the vertical structures. A bottom surface of a portion of the supporting structure on the separation structure may be lower than top surfaces of the conductive pads.