3D Memory Control Gate Formation via Tungsten Replacement
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Solution Overview
Problem
Conventional processes for forming three-dimensional memory structures face issues such as control gate corner rounding, ONON shrinkage, and tungsten deficit, leading to short channel effects and slow program speed in NAND strings.
Innovation Solution
The process involves filling memory holes with a sacrificial material, replacing nitride in the ONON stack with conductive tungsten, and forming memory cell films to prevent corner rounding and shrinkage, ensuring uniformity and preventing control gate-to-control gate shorting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional processes are used to form three-dimensional memory structures, then manufacturing simplicity is maintained, but control gate corner rounding and ONON shrinkage occur leading to short channel effects
Solution Approach 1:
The patent applies preliminary action by forming the blocking layer in backside recesses before replacing the sacrificial material with conductive material. This preliminary blocking layer formation prevents corner rounding of the control gates during subsequent processing steps, as the blocking layer provides structural support and defines the gate geometry early in the process sequence.
Solution Approach 2:
The patent segments the control gate formation process into distinct stages: forming backside recesses, depositing blocking layers in those recesses, then replacing sacrificial material. This segmentation allows the blocking layer to be formed in a protected environment (backside recesses) before the control gate material is deposited, preventing the corner rounding that would occur in conventional monolithic processes.
2Productivity
If conventional processes are used, then process simplicity is maintained, but programming speed becomes slow due to short channel effects
Solution Approach 1:
The blocking layer is formed in backside recesses before control gate material deposition. This preliminary action prevents corner rounding that causes short channel effects, thereby maintaining efficient charge carrier transport and achieving fast programming speeds without sacrificing manufacturing simplicity.
Solution Approach 2:
The blocking layer acts as an intermediary structure formed in the backside recesses that mediates between the sacrificial material and the control gate material. This intermediary blocking layer prevents direct contact and potential corner rounding at critical interfaces, enabling fast programming while keeping the overall process manageable.
3Reliability
If conventional processes are used, then manufacturing simplicity is maintained, but electrical shorts between control gates occur
Solution Approach 1:
The blocking layer is formed in backside recesses before control gate material deposition. This preliminary blocking layer creation ensures electrical isolation between adjacent control gates by providing a dielectric barrier in the recesses, preventing shorts while maintaining a relatively simple overall process flow.
Solution Approach 2:
The blocking layer is selectively formed only in the backside recesses areas where control gate isolation is critical. This local application of the blocking layer provides targeted electrical isolation precisely where needed (at the interfaces between control gates) without requiring blanket dielectric coverage, thus improving reliability with minimal added complexity.
Data Source
AI summary
Techniques for forming 3D memory arrays are disclosed. Memory openings are filled with a sacrificial material, such as silicon or nitride. Afterwards, a replacement technique is used to remove nitride from an ONON stack and replace it with a conductive material such as tungsten. Afterwards, memory cell films are formed in the memory openings. The conductive material serves as control gates of the memory cells. The control gate will not suffer from corner rounding. ONON shrinkage is avoided, which will prevent control gate shrinkage. Block oxide between the charge storage region and control gate may be deposited after control gate replacement, so the uniformity is good. Block oxide may be deposited after control gate replacement, so TiN adjacent to control gates can be thicker to prevent fluorine attacking the insulator between adjacent control gates. Therefore, control gate to control gate shorting is prevented.