3D Memory Device Corner Isolation via Dielectric Support

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The integration of two-dimensional memory devices is limited by the cost of fine pattern formation equipment, and three-dimensional memory devices face failures due to electrode shorting at corner portions during the etching process.

Innovation Solution

A three-dimensional memory device structure with alternately stacked electrode layers and interlayer dielectric layers, featuring stairway structures and dielectric supports that isolate corner portions of the sidewalls, preventing electrode shorting by forming dielectric supports at corner portions and increasing the gap between electrode layers and sidewalls.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the gap between the electrode layer and the sidewall is reduced to increase integration density, then the integration density is improved, but electrode shorting occurs at corner portions during etching

Engineering Contradiction:
Improveintegration densityVSAvoidelectrode shorting prevention
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

A dielectric support structure is introduced as an intermediary element between the electrode layer and the sidewall. This dielectric support prevents direct contact between the electrode and sidewall during etching operations, thereby preventing electrode shorting while allowing the electrode-sidewall gap to be minimized for high integration density.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If fine pattern formation techniques are advanced to increase two-dimensional memory integration, then the integration density is improved, but manufacturing cost increases due to expensive equipment

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing cost
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent transitions from two-dimensional planar memory architecture to three-dimensional stacked architecture. By stacking multiple electrode layers and interlayer dielectric layers vertically, the integration density is dramatically increased without requiring proportionally more expensive fine pattern formation equipment, as the vertical stacking can be achieved with relatively standard manufacturing processes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Quantity of substance

If the stack number of electrode layers is increased to improve three-dimensional memory integration, then the integration density is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The dielectric support structure is formed in advance before the electrode layers are fully stacked and before the etching processes begin. This preliminary formation of the protective dielectric support simplifies subsequent manufacturing steps by pre-preventing potential shorting issues, rather than requiring complex in-process monitoring and adjustment during the stacking and etching operations.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11569265B2Three-dimensional memory device and manufacturing method thereof
Publication Date: 2023.01.31 SK HYNIX INC
  • US11569265B2 patent drawing
  • US11569265B2 patent drawing
  • US11569265B2 patent drawing

AI summary

A three-dimensional memory device includes an electrode structure including a plurality of electrode layers and a plurality of interlayer dielectric layers which are alternately stacked on a substrate; a first stairway structure and a second stairway structure defined in the electrode structure, and positioned at different heights from each other; a sidewall of the electrode structure formed due to a difference in height between the first stairway structure and the second stairway structure; and a dielectric support passing through the electrode structure, and isolating a corner portion of the sidewall from the plurality of electrode layers.