3D Memory Contact Layout With Grouped Depth Etching
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Solution Overview
Problem
Planar memory cells face density limitations and increasing fabrication challenges and costs as feature sizes approach a lower limit, necessitating a shift to 3D memory architectures.
Innovation Solution
A 3D memory device with a stack structure and contact structures divided into groups based on contact depths, using fewer etching masks and steps to form contact holes, reducing the complexity and cost of fabrication while increasing storage density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If planar memory cells are scaled to smaller sizes by improving process technology, then memory density increases, but fabrication complexity and costs increase significantly
Solution Approach 1:
The patent transitions from planar (2D) memory cell architecture to three-dimensional (3D) stacked architecture. Memory stacks are formed vertically extending through multiple interlayer dielectric layers, with contact structures accessing different depths of the stack. This vertical stacking enables significantly higher memory density without proportionally increasing fabrication complexity, as the same planar footprint can accommodate multiple memory layers at different heights.
2Manufacturing precision
If contact structures are formed with multiple etching masks and steps to achieve precise contact depths, then contact precision improves, but manufacturing complexity increases
Solution Approach 1:
The patent divides contact structures into multiple groups based on their contact depths, with each group targeting specific depth ranges within the memory stack. Contact structures are segmented into first groups contacting upper portions of the stack and second groups contacting lower portions. This segmentation allows precise control of contact depths through grouped etching processes, reducing the need for excessive individual masking steps while maintaining manufacturing precision.
Solution Approach 2:
The patent employs preliminary etching steps that create initial contact holes to predetermined depths before subsequent filling and planarization processes. By pre-establishing the contact hole depths and positions through controlled etching, the subsequent manufacturing steps can proceed with greater precision and fewer corrective operations, thereby reducing overall process complexity.
Data Source
AI summary
In certain aspects, a memory device includes a stack structure and contact structures. The stack structure includes alternating first layers and first dielectric layers. The first layers in a first portion of the stack structure include second dielectric layers. The first layers in a second portion of the stack structure include conductive layers. The contact structures extend into the first portion of the stack structure in a first direction and connect to corresponding conductive layers from the conductive layers, respectively. The contact structures are divided into one or more groups based on contact depths of the contact structures in the first direction. The one or more groups include a first group including at least a first subset of the contact structures. The first subset of the contact structures in the first group include a first set of contact shoulders located in a first stack pair.