3D Memory Blocking Dielectric Stack for Charge Leakage Control

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Solution Overview

Problem

Existing three-dimensional memory devices face challenges in efficiently integrating multiple metal oxide blocking dielectric layers to enhance data storage capacity and reliability, particularly in vertical NAND strings.

Innovation Solution

A semiconductor structure is developed with an alternating stack of insulating and conductive layers, featuring memory openings filled with memory films and vertical semiconductor channels, incorporating first and second metal oxide blocking dielectric layers to improve data storage efficiency and reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple metal oxide blocking dielectric layers are integrated to enhance data storage capacity and reliability, then storage capacity and reliability are improved, but device complexity increases

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The blocking dielectric layer is segmented into multiple distinct metal oxide layers (first blocking dielectric layer and second blocking dielectric layer), each potentially serving specific functions. This segmentation allows optimization of each layer's properties while collectively improving overall device reliability and charge blocking capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs composite material structures by combining different metal oxide materials in the blocking dielectric layers. These composite dielectric structures provide enhanced electrical properties and charge blocking capabilities compared to single-material layers, thereby improving data storage reliability.

Inventive Principle:
Principle #40Composite materials

2Quantity of substance

If multiple metal oxide blocking dielectric layers are integrated to enhance data storage capacity, then storage capacity is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvedata storage capacityVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The blocking dielectric layer is segmented into multiple distinct metal oxide layers (first blocking dielectric layer and second blocking dielectric layer), each potentially serving specific functions. This segmentation allows optimization of each layer's properties while collectively improving overall device reliability and charge blocking capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs composite material structures by combining different metal oxide materials in the blocking dielectric layers. These composite dielectric structures provide enhanced electrical properties and charge blocking capabilities compared to single-material layers, thereby improving data storage reliability.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances data storage capacity and reliability by providing a robust structure with improved charge blocking capabilities and reduced leakage, thereby optimizing the performance of three-dimensional memory devices.

Implementation Method 1

each memory film includes a first metal oxide blocking dielectric layer, and a second metal oxide blocking dielectric layer located between each of the vertically neighboring electrically conductive layers and insulating layers

Methodology Applied
Scientific EffectDielectric blocking: Dielectric

Data Source

PatentUS12354944B2Three-dimensional memory device containing plural metal oxide blocking dielectric layers and method of making thereof
Publication Date: 2025.07.08 SANDISK TECHNOLOGIES LLC
  • US12354944B2 patent drawing
  • US12354944B2 patent drawing
  • US12354944B2 patent drawing

AI summary

A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, memory opening fill structures located in the memory openings, where each of the memory opening fill structures includes a memory film and a vertical semiconductor channel that extend vertically, and each memory film includes a first metal oxide blocking dielectric layer, and a second metal oxide blocking dielectric layer located between each of the vertically neighboring electrically conductive layers and insulating layers, and located between each of the first metal oxide blocking dielectric layers and each of the electrically conductive layers.