3D Nonvolatile Memory Structure With Diffusion Stop Layers
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Solution Overview
Problem
The challenge in developing three-dimensional nonvolatile memory devices is to maintain reliability and prevent leakage currents as the number of vertically stacked memory cells increases, requiring innovative structural and material solutions to ensure effective insulation and metal element distribution.
Innovation Solution
The proposed solution involves a three-dimensional nonvolatile memory device with insulating layers, channel layers, diffusion stop layers, and crystalline semiconductor patterns, where the concentration of specific metal elements is higher in the semiconductor patterns than in the channel layers, and slit insulating layers are used to prevent leakage currents, with a vertical word line structure and metal-induced lateral crystallization to enhance reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of vertically stacked memory cells is increased to increase storage capacity, then the storage capacity is improved, but leakage currents increase and reliability deteriorates
Solution Approach 1:
The memory device is divided into multiple cell arrays (first, second, and third cell arrays) spaced apart in the horizontal direction. Each cell array contains vertically stacked memory cells with insulating layers and channel layers. This segmentation isolates leakage currents within individual arrays, preventing them from affecting the entire device, thus maintaining reliability while increasing overall storage capacity.
Solution Approach 2:
Diffusion stop layers are introduced as intermediary structures between adjacent cell arrays. These layers conformally formed in trenches prevent metal element diffusion from one cell array to another, blocking the propagation of leakage currents. The diffusion stop layers act as mediators that maintain electrical isolation while allowing the device to achieve high storage capacity through vertical stacking.
2Stability of the object's composition
If metal elements are distributed in channel layers to enable crystallization, then the crystallization process is improved, but metal diffusion to adjacent structures increases causing leakage
Solution Approach 1:
Metal elements are distributed with different concentrations in different regions. The crystalline semiconductor patterns contain higher concentrations of second metal elements compared to the channel layers' first metal elements. This local quality variation enables effective crystallization in the semiconductor patterns while the diffusion stop layers prevent excessive metal diffusion to adjacent structures, resolving the contradiction between crystallization needs and leakage prevention.
Solution Approach 2:
The concentration of metal elements is carefully controlled and varied across different layers and regions. By adjusting metal element concentrations in the channel layers versus the crystalline semiconductor patterns, the invention optimizes crystallization effectiveness while minimizing harmful diffusion effects. Parameter changes in metal distribution enable simultaneous achievement of stable crystalline structures and reduced leakage currents.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively prevents leakage currents and maintains reliability by ensuring proper metal distribution and crystallization, allowing for continuous metal-induced lateral crystallization and preventing micro-crystallization issues, thereby enhancing the storage capacity and performance of the memory device.
Implementation Method 1
a diffusion stop layer conformally formed in a trench passing through the plurality of insulating layers and the plurality of channel layers in the vertical direction
Implementation Method 2
continuous metal-induced lateral crystallization
Data Source
AI summary
A three-dimensional nonvolatile memory device includes: a plurality of insulating layers stacked on a substrate in a vertical direction substantially perpendicular to a surface of the substrate; a plurality of channel layers positioned between the plurality of insulating layers, and elongated in a first horizontal direction that is parallel to the surface of the substrate, wherein the plurality of channel layers includes a first metal element; a diffusion stop layer conformally formed in a trench passing through the plurality of insulating layers and the plurality of channel layers in the vertical direction; and a crystalline semiconductor pattern between each of the plurality of channel layers and the diffusion stop layer, wherein the crystalline semiconductor pattern includes a second metal element, wherein a concentration of the second metal element in the crystalline semiconductor pattern is higher than a concentration of the first metal element in the plurality of channel layers.