3D Memory Thin-Film Transistor Dual-Source Segmentation
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Solution Overview
Problem
In 3D memory structures like 3D NAND flash memory, thin-film transistors do not directly contact the substrate, making it difficult to provide holes for erasure, and existing methods like GIDL are sensitive to electric fields and can damage the gate oxide, while using a p-type source leads to voltage drops during reading.
Innovation Solution
A 3D memory structure with a thin-film transistor featuring a p-type first source region and an n-type second source region, where the second source region is positioned between the first source and drain regions, allowing for a stable and fast hole source without voltage drops, and a manufacturing method involving the formation of through holes and doping layers to create these regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If GIDL is used to provide holes to the thin-film transistor, then holes can be generated, but the process is sensitive to local electric field, needs long time, and may damage the gate oxide
Solution Approach 1:
The source region is divided into two separate doped regions: a first source region (n-type) and a second source region (p-type). This segmentation allows the p-type second source region to serve as a dedicated hole source for rapid hole generation during erasure, while the n-type first source region maintains proper transistor operation and protects the gate oxide from damage.
Solution Approach 2:
Different doping types are applied to different parts of the source region. The second source region is specifically doped with p-type dopant to create a localized hole source, while the first source region uses n-type dopant. This local quality differentiation enables fast hole generation at the second source region without requiring high electric fields that would damage the gate oxide elsewhere in the device.
2Productivity
If a p-type source is used to provide holes, then hole generation is improved, but voltage drop occurs during reading
Solution Approach 1:
The source region is segmented into two functionally distinct doped regions. The second source region (p-type) is dedicated to hole generation during erasure operations, providing fast and efficient hole supply. The first source region (n-type) handles reading operations, preventing voltage drops and maintaining reading stability. This functional segmentation resolves the contradiction between fast hole generation and reading stability.
3Device complexity
If the thin-film transistor does not contact the substrate directly, then 3D structure is achieved, but it becomes difficult to obtain holes from the substrate
Solution Approach 1:
The second source region (p-type) acts as an intermediary hole source within the 3D structure. Instead of relying on direct substrate contact, holes are generated at the p-type second source region which then supplies holes to the channel. This intermediary mechanism enables efficient hole supply in the 3D configuration without requiring direct substrate contact.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration provides a stable and fast hole source, avoiding the limitations of GIDL-induced holes and voltage drops, while enabling efficient erasure and reading operations in 3D memory devices.
Implementation Method 1
The source region comprises a first source region and a second source region disposed between the first source region and the drain region. The first source region is p-type of doping, the second source region is n-type of doping
Implementation Method 2
the second source region is n-type of doping, and the drain region is n-type of doping
Data Source
AI summary
A three-dimensional (3D) memory and a method for manufacturing the same are disclosed. According to one embodiment, the 3D memory comprises a thin-film transistor. The thin-film transistor has a source region and a drain region disposed separately. The source region comprises a first source region and a second source region disposed between the first source region and the drain region. The first source region is p-type of doping, the second source region is n-type of doping, and the drain region is n-type of doping.