3D Memory Cell Wiring With Dummy Channels for Dense Integration
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Solution Overview
Problem
Semiconductor devices face challenges in increasing integration density and reliability due to limitations in transistor structure design.
Innovation Solution
Incorporation of vertical transistor structures with through-wiring regions that include through-contact plugs, insulating regions, and dummy channel structures to enhance connectivity and reliability, utilizing a stacked substrate configuration with gate electrodes and channel structures that penetrate through the gate electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If planar transistor structures are used, then manufacturing is simpler, but integration density is limited
Solution Approach 1:
The patent transitions from planar (2D) transistor structures to vertical (3D) transistor structures by stacking multiple active layers and gate electrodes vertically. This dimensional change allows multiple transistors to be integrated in a compact footprint area, significantly increasing integration density while maintaining manufacturability through standard semiconductor fabrication processes adapted for vertical architectures.
2Quantity of substance
If vertical transistor structures are used, then integration density increases, but device complexity increases
Solution Approach 1:
The vertical transistor structure is segmented into multiple functional layers including active layers, gate electrodes, insulating layers, and contact regions. Each layer performs a specific function and can be independently fabricated and controlled. This segmentation simplifies the overall device complexity by breaking down the complex vertical structure into manageable, standardized components that can be processed using conventional semiconductor manufacturing techniques.
3Reliability
If through-contact plugs are added to connect memory cell region and peripheral circuit region, then electrical connectivity improves, but manufacturing complexity increases
Solution Approach 1:
The through-contact plugs serve as intermediary elements that bridge the memory cell region and the peripheral circuit region. These plugs penetrate through insulating layers and provide direct electrical pathways between different functional regions of the device. By using standardized plug formation processes and positioning them at strategic locations, the patent achieves reliable electrical connectivity without proportionally increasing manufacturing complexity.
4Reliability
If dummy channel structures are positioned between through-contact plugs, then structural support and reliability improve, but manufacturing precision requirements increase
Solution Approach 1:
Dummy channel structures are formed in advance during the fabrication process, prior to final device assembly and testing. These dummy structures are positioned between through-contact plugs to provide structural support, maintain proper spacing, and ensure mechanical stability. By establishing these structures early in the manufacturing sequence, the patent reduces the precision requirements for subsequent steps and allows for more robust fabrication tolerances.
Data Source
AI summary
A semiconductor device includes a peripheral circuit region on a first substrate and including circuit devices, a memory cell region on a second substrate overlaid on the first substrate, with the memory cell region including gate electrodes stacked to be spaced apart from each other in a first direction perpendicular to an upper surface of the second substrate, and channel structures which extend vertically on the second substrate and penetrate through the gate electrodes. The channel structures may include a channel layer. The semiconductor device includes a through-wiring region with through-contact plugs that extend in the first direction and that electrically connect the memory cell region and the peripheral circuit region to each other, with the through-wiring region including an insulating region that surrounds the through-contact plugs. The through-wiring region further includes dummy channel structures regularly arranged throughout the through-wiring region and which include the channel layer.