3D Memory Electrode Air Gap Structure
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Solution Overview
Problem
In three-dimensional memory devices, increasing the number of electrode layers to enhance memory cell density while maintaining a manageable stack thickness is challenging, as it can lead to electrical breakdown and inter-cell interference due to reduced spacing between electrode layers.
Innovation Solution
Incorporating an air gap between adjacent electrode layers in a three-dimensional memory device structure, which improves breakdown voltage and reduces capacitive coupling between memory cells, thereby minimizing interference and maintaining structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of electrode layers is increased to enhance memory cell density, then memory cell density is improved, but electrical breakdown and inter-cell interference occur due to reduced spacing between electrode layers
Solution Approach 1:
The patent introduces air gaps between adjacent electrode layers in the vertical stacking direction, transitioning from a continuous solid structure to a segmented structure with void spaces. This dimensional modification increases the effective spacing between conductive layers without increasing the overall footprint area, thereby preventing electrical breakdown while maintaining high memory cell density.
Solution Approach 2:
The air gap acts as an intermediary insulating layer between adjacent electrode layers. This intermediate void space provides electrical isolation and reduces capacitive coupling between memory cells, preventing both electrical breakdown and inter-cell interference while allowing the electrode layers to remain in close proximity for high density.
2Quantity of substance
If the number of electrode layers is increased to enhance memory cell density, then memory cell density is improved, but inter-cell interference increases due to reduced spacing between electrode layers
Solution Approach 1:
By introducing air gaps in the vertical dimension between electrode layers, the patent effectively increases the spacing between adjacent memory cells without increasing the lateral dimensions. This dimensional approach reduces capacitive coupling and inter-cell interference while maintaining high memory cell density in the stacked structure.
Solution Approach 2:
The air gap serves as an intermediary insulating medium between adjacent electrode layers, reducing the electric field coupling between memory cells. This intermediate void space minimizes capacitive interference between cells while allowing the electrode layers to remain sufficiently close for high density storage.
3Length of stationary object
If the spacing between electrode layers is reduced to maintain manageable stack thickness, then stack thickness is controlled, but electrical breakdown occurs
Solution Approach 1:
The patent modifies the structure by introducing air gaps between electrode layers, effectively increasing the electrical spacing without increasing the physical stack thickness. This approach allows the stack to remain thin while preventing electrical breakdown through the insulating air gaps that increase the dielectric distance between conductive layers.
Solution Approach 2:
The air gap acts as an intermediary insulating layer between adjacent electrode layers, providing electrical isolation that prevents breakdown. This intermediate void space allows the electrode layers to be positioned closer together physically while maintaining sufficient electrical spacing through the insulating air medium.
Data Source
AI summary
According to one embodiment, a semiconductor device includes a foundation layer, a stacked body provided above the foundation layer, a semiconductor body, and a charge storage portion. The stacked body includes a plurality of electrode layers stacked with an air gap interposed, a plurality of select gate layers stacked in a stacking direction of the electrode layers, and an insulating body provided between the select gate layers adjacent to each other in the stacking direction. The semiconductor body extends in the stacking direction in the stacked body. The charge storage portion is provided between the semiconductor body and one of the electrode layers.