3D Semiconductor Memory Etch Stop Structure for Contact Plug Integration
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Solution Overview
Problem
Current three-dimensional semiconductor memory devices face challenges in achieving high integration and efficient manufacturing processes, particularly in the formation of electrode structures and etch stop layers that enable effective contact plug connections without compromising the integrity of the dielectric layers and electrodes.
Innovation Solution
The proposed solution involves a three-dimensional semiconductor memory device design with a substrate having a cell array region and a connection region, featuring an electrode structure with alternately stacked dielectric layers and electrodes, a stepwise portion on the connection region, and an etch stop structure that includes an etch stop pattern and a horizontal dielectric layer covering both the top and bottom surfaces of the etch stop pattern, allowing for contact plugs to penetrate and connect to corresponding pad portions of the electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If contact plugs are formed to penetrate through the electrode structure to connect to pad portions of electrodes, then electrical connection is achieved, but the structural integrity of dielectric layers and electrodes may be compromised
Solution Approach 1:
The electrode structure is divided into multiple segments with different heights (stepwise portions), allowing contact plugs to connect to specific pad portions without penetrating through the entire electrode structure. This segmentation enables selective electrical connection while preserving the integrity of other dielectric layers and electrodes.
Solution Approach 2:
Etch stop structures are introduced as intermediary elements between the contact plugs and the electrodes. These etch stop structures facilitate the formation of contact holes and provide a controlled interface for electrical connection, thereby maintaining the structural integrity of the underlying dielectric layers and electrodes while enabling reliable contact plug connections.
2Productivity
If traditional planar electrode structures are used, then manufacturing process is simpler, but integration density is limited
Solution Approach 1:
The electrode structure transitions from a traditional planar (two-dimensional) configuration to a three-dimensional stepped configuration. This dimensional change enables multiple contact levels and increased integration density without significantly complicating the manufacturing process, as the stepped structure can be formed using standard deposition and etching techniques.
3Ease of manufacture
If etch stop structures are formed to enable contact plug penetration, then contact formation is facilitated, but device structure becomes more complex
Solution Approach 1:
Etch stop structures are implemented locally at specific regions where contact plugs need to be formed, rather than throughout the entire device. This localized approach facilitates contact plug formation in critical areas while minimizing the overall structural complexity of the device.
Data Source
AI summary
Disclosed are three-dimensional semiconductor memory devices and methods of fabricating the same. A three-dimensional semiconductor memory device including a substrate including a cell array region and a connection region, an electrode structure including a plurality of electrodes and a plurality of dielectric layers alternately stacked on the substrate, the electrode structure having a stepwise portion on the connection region, an etch stop structure on the stepwise portion of the electrode structure, and a plurality of contact plugs on the connection region, the contact plugs penetrating the etch stop structure and connected to corresponding pad portions of the electrodes, respectively, may be provided. The etch stop structure may include an etch stop pattern and a horizontal dielectric layer, which has have a uniform thickness and covers a top surface and a bottom surface of an etch stop pattern.