3D Memory Lateral Isolation Using Backside Trenches and Etch Stops
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in achieving effective lateral isolation and stairless layer contact via structures, which are crucial for efficient memory array formation and inter-block word line isolation.
Innovation Solution
The solution involves forming a three-dimensional memory device with alternating stacks of insulating and sacrificial material layers, where backside trenches and dielectric etch stop structures are created to laterally isolate electrically conductive strips, allowing for the formation of memory openings and fill structures that include vertical semiconductor channels and memory elements, and replacing sacrificial material with electrically conductive strips to achieve lateral isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional three-dimensional memory devices are used, then manufacturing process is simpler, but lateral isolation between blocks is insufficient
Solution Approach 1:
The memory device is divided into multiple blocks separated by backside trenches that extend through alternating stacks of insulating and sacrificial material layers. Each block is laterally isolated by dielectric etch stop structures positioned within the backside trenches, creating distinct electrically isolated regions while maintaining a systematic segmented architecture.
Solution Approach 2:
Dielectric etch stop structures are selectively positioned within backside trenches at specific locations where lateral isolation is required. These structures provide localized electrical isolation between blocks without requiring complete isolation throughout the entire device, optimizing the balance between isolation effectiveness and structural complexity.
2Productivity
If stairless layer contact via structures are implemented, then memory array efficiency improves, but manufacturing precision requirements increase
Solution Approach 1:
Backside trenches and dielectric etch stop structures are formed in advance before memory openings are created. This preliminary structuring establishes the framework for stairless layer contact vias, allowing subsequent via formation to proceed without complex stepped processes, thereby improving memory array efficiency while managing manufacturing precision requirements through staged fabrication.
3Reliability
If backside trenches with dielectric etch stop structures are formed, then lateral isolation between blocks is enhanced, but device complexity increases
Solution Approach 1:
Dielectric etch stop structures serve as intermediary elements positioned within backside trenches to provide lateral electrical isolation between blocks. These intermediary structures mediate the isolation function without requiring direct complex interactions between adjacent blocks, simplifying the overall isolation architecture while maintaining effective electrical separation.
4Reliability
If alternating stacks of insulating and sacrificial material layers are used, then lateral isolation and contact formation are improved, but manufacturing process complexity increases
Solution Approach 1:
The alternating stacks of insulating and sacrificial material layers are formed continuously through the vertical extent of the device, providing uninterrupted lateral isolation and contact formation pathways. This continuous structuring eliminates the need for discrete isolation and contact steps, improving reliability while streamlining the manufacturing process through continuous material deposition and patterning operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient lateral isolation and stairless layer contact via structures, enhancing the memory device's performance by ensuring proper electrical isolation and contact formation between memory blocks, thereby improving memory array efficiency and reliability.
Implementation Method 1
forming backside recesses by performing an isotropic etch process that removes portions of the sacrificial material layers that are proximal to the backside trenches selective to materials of the insulating layers and the dielectric etch stop structures
Data Source
AI summary
A three-dimensional memory device includes alternating stacks of insulating strips and electrically conductive strips, backside trenches located between neighboring pairs of alternating stacks, memory openings vertically extending through the alternating stacks, and memory opening fill structures located within the memory openings. In some embodiments, dielectric etch stop structures may be located within or outside the backside trenches such that each of the dielectric etch stop structures includes a respective pair of dielectric sidewalls that are located within a pair of lengthwise sidewalls of the respective one of the backside trenches. In some other embodiments, a dielectric isolation structure can laterally contact each of the insulating strips within the alternating stacks. Laterally insulated contact via structures can be provided to provide electrical contact to a respective one of the electrically conductive strips.