3D Memory Staircase Etch Stop Plates to Prevent Word-Line Over-Etch
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in efficiently forming staircase regions with varying lateral extents and etch stop layers that effectively prevent over-etching during the manufacturing process, leading to potential electrical shorts and reduced memory array performance.
Innovation Solution
A method involving the formation of an alternating stack of insulating and sacrificial material layers over a substrate, with stepped surfaces created using patterning, followed by selective deposition of semiconductor material plates that are converted into etch stop plates, and subsequent replacement with electrically conductive layers and contact via structures, utilizing materials like tungsten nitride, tungsten carbide, or silicon carbide for etch stop functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If etch stop layers are not properly formed or positioned, then manufacturing process is simpler, but over-etching occurs causing electrical shorts and reduced performance
Solution Approach 1:
Etch stop plates are formed in advance during the alternating stack fabrication process, before the word line etching step. These plates are positioned at specific depths corresponding to different word line levels, so that when word line etching is performed later, the etch process automatically stops at the predetermined depths defined by the etch stop plates, preventing over-etching and electrical shorts.
Solution Approach 2:
The etch stop plates serve as intermediary structures between the alternating stack and the word line structures. Made from materials with distinct etch selectivity (such as tungsten nitride, tungsten carbide, or silicon carbide), these plates act as mediators that control the etching process, allowing precise formation of word lines at different depths while preventing harmful over-etching.
2Reliability
If staircase regions with varying lateral extents are formed, then memory device performance is enhanced, but manufacturing precision requirements increase
Solution Approach 1:
The alternating stack is designed with local variations in the lateral extents of electrically conductive layers at different vertical positions, creating staircase regions. Each level of the alternating stack has tailored lateral dimensions optimized for specific functional requirements, allowing precise control of electrical properties and memory performance at different depths while managing manufacturing precision through localized design adjustments.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of reliable three-dimensional memory devices with vertically extending memory stack structures and contact via structures, reducing the risk of electrical shorts and enhancing the structural integrity and performance of the memory array by effectively managing etch stop layers.
Implementation Method 1
forming semiconductor material plates over physically exposed horizontal surfaces of the sacrificial material layers in the staircase region employing a selective deposition process in which a semiconductor material selectively grows from the physically exposed horizontal surfaces of the sacrificial material layers
Implementation Method 2
implanting ions through the via cavities into portions of the etch stop layer that underlie the via cavities such that the implanted portions of the etch stop layer become amorphous
Data Source
AI summary
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory stack structures vertically extending through the alternating stack, etch stop plates located in the staircase region, laterally and vertically spaced apart among one another, and overlying an end portion of a respective one of the electrically conductive layers, and contact via structures located in a staircase region, vertically extending through a respective one of the etch stop plates, and contacting a respective one of the electrically conductive layers.