3D Nonvolatile Memory Channel Structure With Etch-Stop Stacking

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Solution Overview

Problem

Current nonvolatile memory devices face limitations in integration density and operating reliability due to the area occupied by unit memory cells, particularly in two-dimensional designs, which can be overcome by adopting a three-dimensional stacking approach.

Innovation Solution

The proposed solution involves a nonvolatile memory device structure with a substrate, semiconductor layers, an etching stop film, a mold structure, and a channel structure that includes anti-oxidant, blocking insulation, charge storage, and tunnel insulating films, along with a common source line and bit line configuration, allowing for increased integration density and improved reliability through vertical stacking and specific fabrication methods.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If two-dimensional planar memory device design is used, then fabrication process is simpler, but integration density is limited

Engineering Contradiction:
Improvefabrication process simplicityVSAvoidintegration density
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The patent transitions from two-dimensional planar memory cell layout to three-dimensional vertical stacking architecture. Multiple memory cells are stacked vertically along the Z-axis, with alternating layers of first and second semiconductor materials forming distinct memory cells that share common tunnel insulating films and charge storage films, thereby achieving higher integration density while maintaining fabrication feasibility through extended process steps

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If three-dimensional vertical stacking is implemented, then integration density increases, but device complexity increases

Engineering Contradiction:
Improveintegration densityVSAvoiddevice structure complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The vertical stack is segmented into distinct memory cells separated by common tunnel insulating films and charge storage films. Each memory cell contains alternating layers of first and second semiconductor materials that are spatially separated but electrically connected through shared films, allowing independent operation of each cell while maintaining a compact vertical structure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The common tunnel insulating films and charge storage films serve multiple functions: they act as barriers between adjacent memory cells, provide charge storage capability for multiple cells simultaneously, and enable electrical connection between different semiconductor layers. This multi-functionality reduces the total number of distinct film layers needed compared to fully independent cell structures

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If conventional etching processes are used without selective stop films, then process steps are fewer, but manufacturing precision decreases

Engineering Contradiction:
Improveprocess stepsVSAvoidetching depth control
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

Etching stop films are pre-formed between the substrate and the vertical memory cell stack before the main etching process. These stop films are strategically positioned to define precise etching depths for forming channel holes and source/drain regions, ensuring that etching stops at the correct location without requiring complex real-time monitoring or multiple sequential etching steps

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11856772B2Nonvolatile memory device and method of fabricating same
Publication Date: 2023.12.26 SAMSUNG ELECTRONICS CO LTD
  • US11856772B2 patent drawing
  • US11856772B2 patent drawing
  • US11856772B2 patent drawing

AI summary

A nonvolatile memory device and method of fabricating same, the nonvolatile memory device including a substrate; a first semiconductor layer on the substrate; an etching stop film including a metal oxide on the first semiconductor layer; a mold structure including second semiconductor layers and insulating layers alternately stacked on the etching stop film; a channel hole penetrating through at least one of the mold structure, the etching stop film, the second semiconductor layer and the substrate; and a channel structure extending along a side wall of the channel hole, including an anti-oxidant film, a first blocking insulation film, a second blocking insulation film, a charge storage film, a tunnel insulating film and a channel semiconductor sequentially formed along the side wall of the channel hole. The first semiconductor layer contacts the first blocking insulation film, the second blocking insulation film, the charge storage film, and the tunnel insulating film.